| Message ID | 1246015755-9267-1-git-send-email-rnayak@ti.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Kevin Hilman |
| Headers | show |
Rajendra Nayak <rnayak@ti.com> writes: > The clock stabilization delay post a M2 divider change is needed > even before a SDRC interface clock re-enable and not only before > jumping back to SDRAM. > > Signed-off-by: Rajendra Nayak <rnayak@ti.com> Thanks, pushing to PM branch (and pm-2.6.29) Kevin > --- > arch/arm/mach-omap2/sram34xx.S | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S > index f41f8d9..481f912 100644 > --- a/arch/arm/mach-omap2/sram34xx.S > +++ b/arch/arm/mach-omap2/sram34xx.S > @@ -97,6 +97,8 @@ ENTRY(omap3_sram_configure_core_dpll) > blne lock_dll > bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC > bl configure_core_dpll @ change the DPLL3 M2 divider > + mov r12, r5 > + bl wait_clk_stable @ wait for SDRC to stabilize > bl enable_sdrc @ take SDRC out of idle > cmp r4, #SDRC_UNLOCK_DLL @ wait for DLL status to change > bleq wait_dll_unlock > @@ -104,8 +106,6 @@ ENTRY(omap3_sram_configure_core_dpll) > cmp r7, #1 @ if increasing SDRC clk rate, > beq return_to_sdram @ return to SDRAM code, otherwise, > bl configure_sdrc @ reprogram SDRC regs now > - mov r12, r5 > - bl wait_clk_stable @ wait for SDRC to stabilize > return_to_sdram: > isb @ prevent speculative exec past here > mov r0, #0 @ return value > -- > 1.5.4.7 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, 26 Jun 2009, Rajendra Nayak wrote: > The clock stabilization delay post a M2 divider change is needed > even before a SDRC interface clock re-enable and not only before > jumping back to SDRAM. > > Signed-off-by: Rajendra Nayak <rnayak@ti.com> For the archives: this patch has been accepted and sent upstream for 2.6.31-rc fixes. - Paul > --- > arch/arm/mach-omap2/sram34xx.S | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S > index f41f8d9..481f912 100644 > --- a/arch/arm/mach-omap2/sram34xx.S > +++ b/arch/arm/mach-omap2/sram34xx.S > @@ -97,6 +97,8 @@ ENTRY(omap3_sram_configure_core_dpll) > blne lock_dll > bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC > bl configure_core_dpll @ change the DPLL3 M2 divider > + mov r12, r5 > + bl wait_clk_stable @ wait for SDRC to stabilize > bl enable_sdrc @ take SDRC out of idle > cmp r4, #SDRC_UNLOCK_DLL @ wait for DLL status to change > bleq wait_dll_unlock > @@ -104,8 +106,6 @@ ENTRY(omap3_sram_configure_core_dpll) > cmp r7, #1 @ if increasing SDRC clk rate, > beq return_to_sdram @ return to SDRAM code, otherwise, > bl configure_sdrc @ reprogram SDRC regs now > - mov r12, r5 > - bl wait_clk_stable @ wait for SDRC to stabilize > return_to_sdram: > isb @ prevent speculative exec past here > mov r0, #0 @ return value > -- > 1.5.4.7 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index f41f8d9..481f912 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -97,6 +97,8 @@ ENTRY(omap3_sram_configure_core_dpll) blne lock_dll bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC bl configure_core_dpll @ change the DPLL3 M2 divider + mov r12, r5 + bl wait_clk_stable @ wait for SDRC to stabilize bl enable_sdrc @ take SDRC out of idle cmp r4, #SDRC_UNLOCK_DLL @ wait for DLL status to change bleq wait_dll_unlock @@ -104,8 +106,6 @@ ENTRY(omap3_sram_configure_core_dpll) cmp r7, #1 @ if increasing SDRC clk rate, beq return_to_sdram @ return to SDRAM code, otherwise, bl configure_sdrc @ reprogram SDRC regs now - mov r12, r5 - bl wait_clk_stable @ wait for SDRC to stabilize return_to_sdram: isb @ prevent speculative exec past here mov r0, #0 @ return value
The clock stabilization delay post a M2 divider change is needed even before a SDRC interface clock re-enable and not only before jumping back to SDRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> --- arch/arm/mach-omap2/sram34xx.S | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)