| Message ID | 1391700529-11816-2-git-send-email-iivanov@mm-sol.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
On Thu, Feb 6, 2014 at 7:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > Add the pin control node and pin definitions of SPI8. > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > --- > arch/arm/boot/dts/qcom-msm8974.dtsi | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > index 9e5dadb..395603f 100644 > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > @@ -117,5 +117,34 @@ > clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; > clock-names = "core", "iface"; > }; > + > + msmgpio: pinctrl@fd510000 { > + compatible = "qcom,msm8974-pinctrl"; > + reg = <0xfd510000 0x4000>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupts = <0 208 0>; > + > + spi8_default: spi8_default { > + mosi { > + pins = "gpio45"; > + function = "blsp_spi8"; > + }; > + miso { > + pins = "gpio46"; > + function = "blsp_spi8"; > + }; > + cs { > + pins = "gpio47"; > + function = "blsp_spi8"; > + }; > + clk { > + pins = "gpio48"; > + function = "blsp_spi8"; > + }; > + }; > + }; > }; > }; Nice, listing it like this makes it easy to add the electrical properties when inheriting these nodes, closer to the product dts files. Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Feb 10, 2014, at 12:55 PM, Bjorn Andersson <bjorn@kryo.se> wrote: > On Thu, Feb 6, 2014 at 7:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: >> From: "Ivan T. Ivanov" <iivanov@mm-sol.com> >> >> Add the pin control node and pin definitions of SPI8. >> >> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> >> --- >> arch/arm/boot/dts/qcom-msm8974.dtsi | 29 +++++++++++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi >> index 9e5dadb..395603f 100644 >> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi >> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi >> @@ -117,5 +117,34 @@ >> clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; >> clock-names = "core", "iface"; >> }; >> + >> + msmgpio: pinctrl@fd510000 { >> + compatible = "qcom,msm8974-pinctrl"; >> + reg = <0xfd510000 0x4000>; >> + gpio-controller; >> + #gpio-cells = <2>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + interrupts = <0 208 0>; >> + >> + spi8_default: spi8_default { >> + mosi { >> + pins = "gpio45"; >> + function = "blsp_spi8"; >> + }; >> + miso { >> + pins = "gpio46"; >> + function = "blsp_spi8"; >> + }; >> + cs { >> + pins = "gpio47"; >> + function = "blsp_spi8"; >> + }; >> + clk { >> + pins = "gpio48"; >> + function = "blsp_spi8"; >> + }; >> + }; >> + }; >> }; >> }; > > Nice, listing it like this makes it easy to add the electrical > properties when inheriting these nodes, closer to the product dts > files. > > Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Linus, I can take the .dts patch via the linux-qcom tree to keep it with other DT changes if you want to provide an ack. - k
On Thu, Feb 6, 2014 at 4:28 PM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > From: "Ivan T. Ivanov" <iivanov@mm-sol.com> > > Add the pin control node and pin definitions of SPI8. > > Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Kumar, please take this through your qcom tree. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Feb 24, 2014, at 3:57 AM, Linus Walleij <linus.walleij@linaro.org> wrote: > On Thu, Feb 6, 2014 at 4:28 PM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > >> From: "Ivan T. Ivanov" <iivanov@mm-sol.com> >> >> Add the pin control node and pin definitions of SPI8. >> >> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > Kumar, please take this through your qcom tree. applied to qcom/dt - k
On Thu, Feb 6, 2014 at 9:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > + spi8_default: spi8_default { > + mosi { > + pins = "gpio45"; > + function = "blsp_spi8"; > + }; > + miso { > + pins = "gpio46"; > + function = "blsp_spi8"; > + }; > + cs { > + pins = "gpio47"; > + function = "blsp_spi8"; > + }; > + clk { > + pins = "gpio48"; > + function = "blsp_spi8"; > + }; I'm confused by this. Isn't this information already defined in the pinctrl-msm8x74.c driver? static const char * const blsp_spi8_groups[] = { "gpio45", "gpio46", "gpio47", "gpio48" }; -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Feb 6, 2014 at 9:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > + msmgpio: pinctrl@fd510000 { > + compatible = "qcom,msm8974-pinctrl"; > + reg = <0xfd510000 0x4000>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupts = <0 208 0>; > + > + spi8_default: spi8_default { > + mosi { > + pins = "gpio45"; > + function = "blsp_spi8"; > + }; > + miso { > + pins = "gpio46"; > + function = "blsp_spi8"; > + }; > + cs { > + pins = "gpio47"; > + function = "blsp_spi8"; > + }; > + clk { > + pins = "gpio48"; > + function = "blsp_spi8"; > + }; > + }; > + }; > }; > }; I'm confused by this. Isn't this information already defined in the pinctrl-msm8x74.c driver? static const char * const blsp_spi8_groups[] = { "gpio45", "gpio46", "gpio47", "gpio48" };
Hi, On Mon, 2014-04-07 at 18:53 -0500, Timur Tabi wrote: > On Thu, Feb 6, 2014 at 9:28 AM, Ivan T. Ivanov <iivanov@mm-sol.com> wrote: > > + spi8_default: spi8_default { > > + mosi { > > + pins = "gpio45"; > > + function = "blsp_spi8"; > > + }; > > + miso { > > + pins = "gpio46"; > > + function = "blsp_spi8"; > > + }; > > + cs { > > + pins = "gpio47"; > > + function = "blsp_spi8"; > > + }; > > + clk { > > + pins = "gpio48"; > > + function = "blsp_spi8"; > > + }; > > I'm confused by this. Isn't this information already defined in the > pinctrl-msm8x74.c driver? > > static const char * const blsp_spi8_groups[] = { > "gpio45", "gpio46", "gpio47", "gpio48" > }; I am not sure that I understand the question. This is one of possible ways to describe relationship between pins and functions. As they are described is visible what is their real purpose. Regards, Ivan -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Ivan T. Ivanov wrote: >> >I'm confused by this. Isn't this information already defined in the >> >pinctrl-msm8x74.c driver? >> > >> >static const char * const blsp_spi8_groups[] = { >> > "gpio45", "gpio46", "gpio47", "gpio48" >> >}; > I am not sure that I understand the question. This is one of > possible ways to describe relationship between pins and functions. > As they are described is visible what is their real purpose. Ok, let me rephrase. The 8x74 pinctrl driver already contains this information. It already defines a "blsp_spi8" group consisting of GPIOs 45, 46, 47, and 48. This patch adds that same exact information into the device tree. Why are we duplicating that information? Why add it to the device tree when it's already in the driver (and already working). Also, I don't see any code anywhere that uses these new device tree nodes. -- Sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, 2014-04-08 at 07:33 -0500, Timur Tabi wrote: > Ivan T. Ivanov wrote: > >> >I'm confused by this. Isn't this information already defined in the > >> >pinctrl-msm8x74.c driver? > >> > > >> >static const char * const blsp_spi8_groups[] = { > >> > "gpio45", "gpio46", "gpio47", "gpio48" > >> >}; > > I am not sure that I understand the question. This is one of > > possible ways to describe relationship between pins and functions. > > As they are described is visible what is their real purpose. > > Ok, let me rephrase. > > The 8x74 pinctrl driver already contains this information. It already > defines a "blsp_spi8" group consisting of GPIOs 45, 46, 47, and 48. > > This patch adds that same exact information into the device tree. Why > are we duplicating that information? Why add it to the device tree when > it's already in the driver (and already working). Probably. It was my natural way of thinking. Pin have a functions. It is easier if I measure signals to just look at the device tree file. What are you suggesting? > > Also, I don't see any code anywhere that uses these new device tree nodes. This is easy to fix :-). Regards, Ivan -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 04/08/2014 08:46 AM, Ivan T. Ivanov wrote: >> >This patch adds that same exact information into the device tree. Why >> >are we duplicating that information? Why add it to the device tree when >> >it's already in the driver (and already working). > Probably. It was my natural way of thinking. Pin have a functions. > It is easier if I measure signals to just look at the device > tree file. What are you suggesting? Back in July, Qualcomm submitted a patch that added this information into the device tree: http://marc.info/?t=137185166100003&r=1&w=2 However, this was rejected. Now it appears that this information is again being added to the device tree, but it's being accepted. What's different now? Another problem is that these device tree changes makes it difficult to support ACPI. It's easy to move information between the drivers and the device tree, because they're kept together. It's not so easy with ACPI. I'm trying to add ACPI support to the 8x74 pinctrl driver, but it's a moving target.
On 04/08/2014 09:18 AM, Timur Tabi wrote: > > Back in July, Qualcomm submitted a patch that added this information > into the device tree: > > http://marc.info/?t=137185166100003&r=1&w=2 > > However, this was rejected. Now it appears that this information is > again being added to the device tree, but it's being accepted. What's > different now? After re-reading the documentation and having someone kindly explain this to me, I understand it now. The device tree is only specifying specific configurations that a driver wants, not the sum total of all possible groupings.
On Tue, Apr 8, 2014 at 7:18 AM, Timur Tabi <timur@codeaurora.org> wrote: > On 04/08/2014 08:46 AM, Ivan T. Ivanov wrote: >>> >>> >This patch adds that same exact information into the device tree. Why >>> >are we duplicating that information? Why add it to the device tree when >>> >it's already in the driver (and already working). > > >> Probably. It was my natural way of thinking. Pin have a functions. >> It is easier if I measure signals to just look at the device >> tree file. What are you suggesting? > > > Back in July, Qualcomm submitted a patch that added this information into > the device tree: > > http://marc.info/?t=137185166100003&r=1&w=2 > > However, this was rejected. Now it appears that this information is again > being added to the device tree, but it's being accepted. What's different > now? The difference is that in the first proposal pins, groups and functions where defined in DT, in the accepted proposal the devicetree merely selects pins, functions and their configuration. > > Another problem is that these device tree changes makes it difficult to > support ACPI. It's easy to move information between the drivers and the > device tree, because they're kept together. It's not so easy with ACPI. > I'm trying to add ACPI support to the 8x74 pinctrl driver, but it's a moving > target. The DT bindings for 8x74 is all standard pinctrl, so I presume that what you should be looking at is how pinctrl and acpi is interacting, not the specific case of 8x74... Maybe Linus have some input on this? Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Apr 8, 2014 at 8:39 PM, Bjorn Andersson <bjorn@kryo.se> wrote: > On Tue, Apr 8, 2014 at 7:18 AM, Timur Tabi <timur@codeaurora.org> wrote: >> Back in July, Qualcomm submitted a patch that added this information into >> the device tree: >> >> http://marc.info/?t=137185166100003&r=1&w=2 >> >> However, this was rejected. Now it appears that this information is again >> being added to the device tree, but it's being accepted. What's different >> now? > > The difference is that in the first proposal pins, groups and > functions where defined in DT, in the accepted proposal the devicetree > merely selects pins, functions and their configuration. Yes and I point this out in this reply: http://marc.info/?l=linux-kernel&m=137650778624988&w=2 >> Another problem is that these device tree changes makes it difficult to >> support ACPI. It's easy to move information between the drivers and the >> device tree, because they're kept together. It's not so easy with ACPI. >> I'm trying to add ACPI support to the 8x74 pinctrl driver, but it's a moving >> target. > > The DT bindings for 8x74 is all standard pinctrl, so I presume that > what you should be looking at is how pinctrl and acpi is interacting, > not the specific case of 8x74... > > Maybe Linus have some input on this? AFAIK ACPI has nothing like official pin control support, last time I checked it was limited to some custom information that could be tagged onto GPIO pins (REALLY a bad idea, we don't shoehorn pin control into the concept of GPIO). If you are adding this then tell me which ACPI standard document you're using for it, so I can read and criticize it. I was under the impression that the ambition of ACPI was to hide away all "complex stuff" such as pin control in the firmware and just e.g. call the devices into some D-state and the pin business happens in the firmware. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 9e5dadb..395603f 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -117,5 +117,34 @@ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; }; + + msmgpio: pinctrl@fd510000 { + compatible = "qcom,msm8974-pinctrl"; + reg = <0xfd510000 0x4000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 208 0>; + + spi8_default: spi8_default { + mosi { + pins = "gpio45"; + function = "blsp_spi8"; + }; + miso { + pins = "gpio46"; + function = "blsp_spi8"; + }; + cs { + pins = "gpio47"; + function = "blsp_spi8"; + }; + clk { + pins = "gpio48"; + function = "blsp_spi8"; + }; + }; + }; }; };