| Message ID | 1394487610-2419-8-git-send-email-soren.brinkmann@xilinx.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 03/10/2014 10:40 PM, Soren Brinkmann wrote: > The Zynq UART is Cadence IP and the driver has been renamed accordingly. > Migrate the DT to use the new binding for the UART driver. > > Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> > Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > This change depends on 'tty: xuartps: Rebrand driver as Cadence UART', > which introduces the new clock-names. > --- > arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi > index 8b67b19392ec..0ed0d4b0579a 100644 > --- a/arch/arm/boot/dts/zynq-7000.dtsi > +++ b/arch/arm/boot/dts/zynq-7000.dtsi > @@ -67,19 +67,19 @@ > }; > > uart0: uart@e0000000 { > - compatible = "xlnx,xuartps"; > + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; > status = "disabled"; > clocks = <&clkc 23>, <&clkc 40>; > - clock-names = "ref_clk", "aper_clk"; > + clock-names = "uart_clk", "pclk"; > reg = <0xE0000000 0x1000>; > interrupts = <0 27 4>; > }; > > uart1: uart@e0001000 { > - compatible = "xlnx,xuartps"; > + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; > status = "disabled"; > clocks = <&clkc 24>, <&clkc 41>; > - clock-names = "ref_clk", "aper_clk"; > + clock-names = "uart_clk", "pclk"; > reg = <0xE0001000 0x1000>; > interrupts = <0 50 4>; > }; This should be at least the part of 5/7 because between 5/7 and 7/7 driver will fail to probe. Thanks, Michal
On Tue, 2014-03-11 at 09:52AM +0100, Michal Simek wrote: > On 03/10/2014 10:40 PM, Soren Brinkmann wrote: > > The Zynq UART is Cadence IP and the driver has been renamed accordingly. > > Migrate the DT to use the new binding for the UART driver. > > > > Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> > > Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> > > Acked-by: Rob Herring <robh@kernel.org> > > --- > > This change depends on 'tty: xuartps: Rebrand driver as Cadence UART', > > which introduces the new clock-names. > > --- > > arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi > > index 8b67b19392ec..0ed0d4b0579a 100644 > > --- a/arch/arm/boot/dts/zynq-7000.dtsi > > +++ b/arch/arm/boot/dts/zynq-7000.dtsi > > @@ -67,19 +67,19 @@ > > }; > > > > uart0: uart@e0000000 { > > - compatible = "xlnx,xuartps"; > > + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; > > status = "disabled"; > > clocks = <&clkc 23>, <&clkc 40>; > > - clock-names = "ref_clk", "aper_clk"; > > + clock-names = "uart_clk", "pclk"; > > reg = <0xE0000000 0x1000>; > > interrupts = <0 27 4>; > > }; > > > > uart1: uart@e0001000 { > > - compatible = "xlnx,xuartps"; > > + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; > > status = "disabled"; > > clocks = <&clkc 24>, <&clkc 41>; > > - clock-names = "ref_clk", "aper_clk"; > > + clock-names = "uart_clk", "pclk"; > > reg = <0xE0001000 0x1000>; > > interrupts = <0 50 4>; > > }; > > This should be at least the part of 5/7 because between 5/7 and 7/7 > driver will fail to probe. The driver should never fail to probe. The old bindings will continue to work. So, only dependency for this is, the new clock names must be merged in. So, it has to be rather late in the series. Sören
On 03/11/2014 04:48 PM, Sören Brinkmann wrote: > On Tue, 2014-03-11 at 09:52AM +0100, Michal Simek wrote: >> On 03/10/2014 10:40 PM, Soren Brinkmann wrote: >>> The Zynq UART is Cadence IP and the driver has been renamed accordingly. >>> Migrate the DT to use the new binding for the UART driver. >>> >>> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> >>> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> >>> Acked-by: Rob Herring <robh@kernel.org> >>> --- >>> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART', >>> which introduces the new clock-names. >>> --- >>> arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++---- >>> 1 file changed, 4 insertions(+), 4 deletions(-) >>> >>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi >>> index 8b67b19392ec..0ed0d4b0579a 100644 >>> --- a/arch/arm/boot/dts/zynq-7000.dtsi >>> +++ b/arch/arm/boot/dts/zynq-7000.dtsi >>> @@ -67,19 +67,19 @@ >>> }; >>> >>> uart0: uart@e0000000 { >>> - compatible = "xlnx,xuartps"; >>> + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; >>> status = "disabled"; >>> clocks = <&clkc 23>, <&clkc 40>; >>> - clock-names = "ref_clk", "aper_clk"; >>> + clock-names = "uart_clk", "pclk"; >>> reg = <0xE0000000 0x1000>; >>> interrupts = <0 27 4>; >>> }; >>> >>> uart1: uart@e0001000 { >>> - compatible = "xlnx,xuartps"; >>> + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; >>> status = "disabled"; >>> clocks = <&clkc 24>, <&clkc 41>; >>> - clock-names = "ref_clk", "aper_clk"; >>> + clock-names = "uart_clk", "pclk"; >>> reg = <0xE0001000 0x1000>; >>> interrupts = <0 50 4>; >>> }; >> >> This should be at least the part of 5/7 because between 5/7 and 7/7 >> driver will fail to probe. > > The driver should never fail to probe. The old bindings will continue to > work. So, only dependency for this is, the new clock names must be > merged in. So, it has to be rather late in the series. We discussed this over phone and yes, I have missed that. Thanks, Michal
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 8b67b19392ec..0ed0d4b0579a 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -67,19 +67,19 @@ }; uart0: uart@e0000000 { - compatible = "xlnx,xuartps"; + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; clocks = <&clkc 23>, <&clkc 40>; - clock-names = "ref_clk", "aper_clk"; + clock-names = "uart_clk", "pclk"; reg = <0xE0000000 0x1000>; interrupts = <0 27 4>; }; uart1: uart@e0001000 { - compatible = "xlnx,xuartps"; + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; clocks = <&clkc 24>, <&clkc 41>; - clock-names = "ref_clk", "aper_clk"; + clock-names = "uart_clk", "pclk"; reg = <0xE0001000 0x1000>; interrupts = <0 50 4>; };