| Message ID | 1392183693-21238-2-git-send-email-victor.kamensky@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Feb 11, 2014 at 09:41:27PM -0800, Victor Kamensky wrote: > Switch hypervisor to run in BE mode if image is compiled > with CONFIG_CPU_BIG_ENDIAN. > > Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> > --- > arch/arm/kvm/init.S | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S > index 1b9844d..74f0718 100644 > --- a/arch/arm/kvm/init.S > +++ b/arch/arm/kvm/init.S > @@ -22,6 +22,7 @@ > #include <asm/kvm_asm.h> > #include <asm/kvm_arm.h> > #include <asm/kvm_mmu.h> > +#include <asm/assembler.h> > > /******************************************************************** > * Hypervisor initialization > @@ -70,6 +71,8 @@ __do_hyp_init: > cmp r0, #0 @ We have a SP? > bne phase2 @ Yes, second stage init > > +ARM_BE8(setend be) @ Switch to Big Endian mode if needed > + > @ Set the HTTBR to point to the hypervisor PGD pointer passed > mcrr p15, 4, r2, r3, c2 > > -- > 1.8.1.4 > Won't splitting up the patches this way break bisectability? -Christoffer
On 18 March 2014 15:23, Christoffer Dall <christoffer.dall@linaro.org> wrote: > On Tue, Feb 11, 2014 at 09:41:27PM -0800, Victor Kamensky wrote: >> Switch hypervisor to run in BE mode if image is compiled >> with CONFIG_CPU_BIG_ENDIAN. >> >> Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> >> --- >> arch/arm/kvm/init.S | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S >> index 1b9844d..74f0718 100644 >> --- a/arch/arm/kvm/init.S >> +++ b/arch/arm/kvm/init.S >> @@ -22,6 +22,7 @@ >> #include <asm/kvm_asm.h> >> #include <asm/kvm_arm.h> >> #include <asm/kvm_mmu.h> >> +#include <asm/assembler.h> >> >> /******************************************************************** >> * Hypervisor initialization >> @@ -70,6 +71,8 @@ __do_hyp_init: >> cmp r0, #0 @ We have a SP? >> bne phase2 @ Yes, second stage init >> >> +ARM_BE8(setend be) @ Switch to Big Endian mode if needed >> + >> @ Set the HTTBR to point to the hypervisor PGD pointer passed >> mcrr p15, 4, r2, r3, c2 >> >> -- >> 1.8.1.4 >> > > Won't splitting up the patches this way break bisectability? I don't think so. I think if just only this patch applied BE image built with CONFIG_VIRTUALIZATION=y and CONFIG_KVM=y will at least boot. KVM will not work of course without remaining patches. Currently for BE image CONFIG_VIRTUALIZATION and CONFIG_KVM should be explicitly turned off - otherwise image won't boot. As far as LE image concerned it is NOP change. Or do you have any specific idea how it could break bisectability? Thanks, Victor > -Christoffer
On Tue, Mar 18, 2014 at 03:23:35PM -0700, Christoffer Dall wrote: > On Tue, Feb 11, 2014 at 09:41:27PM -0800, Victor Kamensky wrote: > > Switch hypervisor to run in BE mode if image is compiled > > with CONFIG_CPU_BIG_ENDIAN. > > > > Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> > > --- > > arch/arm/kvm/init.S | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S > > index 1b9844d..74f0718 100644 > > --- a/arch/arm/kvm/init.S > > +++ b/arch/arm/kvm/init.S > > @@ -22,6 +22,7 @@ > > #include <asm/kvm_asm.h> > > #include <asm/kvm_arm.h> > > #include <asm/kvm_mmu.h> > > +#include <asm/assembler.h> > > > > /******************************************************************** > > * Hypervisor initialization > > @@ -70,6 +71,8 @@ __do_hyp_init: > > cmp r0, #0 @ We have a SP? > > bne phase2 @ Yes, second stage init > > > > +ARM_BE8(setend be) @ Switch to Big Endian mode if needed > > + > > @ Set the HTTBR to point to the hypervisor PGD pointer passed > > mcrr p15, 4, r2, r3, c2 > > > > -- > > 1.8.1.4 > > > > Won't splitting up the patches this way break bisectability? > Second thought, scratch that, because BE support is not supposed to work before applying these patches anyhow I guess. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> -Christoffer
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S index 1b9844d..74f0718 100644 --- a/arch/arm/kvm/init.S +++ b/arch/arm/kvm/init.S @@ -22,6 +22,7 @@ #include <asm/kvm_asm.h> #include <asm/kvm_arm.h> #include <asm/kvm_mmu.h> +#include <asm/assembler.h> /******************************************************************** * Hypervisor initialization @@ -70,6 +71,8 @@ __do_hyp_init: cmp r0, #0 @ We have a SP? bne phase2 @ Yes, second stage init +ARM_BE8(setend be) @ Switch to Big Endian mode if needed + @ Set the HTTBR to point to the hypervisor PGD pointer passed mcrr p15, 4, r2, r3, c2
Switch hypervisor to run in BE mode if image is compiled with CONFIG_CPU_BIG_ENDIAN. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> --- arch/arm/kvm/init.S | 3 +++ 1 file changed, 3 insertions(+)