| Message ID | 1395188579-17191-11-git-send-email-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Mar 18, 2014 at 05:22:55PM -0700, Matt Roper wrote: > The name 'update_plane' was used both for the primary plane functions in > intel_display.c and the sprite/overlay functions in intel_sprite.c. > Rename the primary plane functions to 'update_primary_plane' to avoid > confusion. > > On a similar note, intel_display.c already had a function called > intel_disable_primary_plane() that programs the hardware to disable a > pipe's primary plane. When we hook up primary planes through the DRM > plane interface, one of the natural handler names will be > intel_primary_plane_disable(), which is very similar. To avoid > confusion, rename the existing intel_disable_primary_plane() to > intel_disable_primary_hw_plane() to make the two names a little more > distinct. > > Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Hah, here's the reason why doing a crtc->fb -> crtc->primary->fb flagday isn't good ;-) Wanted to pull this in since I like it, and it conflicted. Fixed up and merged to dinq, thanks. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.h | 5 +-- > drivers/gpu/drm/i915/intel_display.c | 60 ++++++++++++++++++++---------------- > 2 files changed, 36 insertions(+), 29 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 70fbe90..a937711 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -462,8 +462,9 @@ struct drm_i915_display_funcs { > struct drm_framebuffer *fb, > struct drm_i915_gem_object *obj, > uint32_t flags); > - int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb, > - int x, int y); > + int (*update_primary_plane)(struct drm_crtc *crtc, > + struct drm_framebuffer *fb, > + int x, int y); > void (*hpd_irq_setup)(struct drm_device *dev); > /* clock updates for mode set */ > /* cursor updates */ > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index c2f3730..849a241 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1872,15 +1872,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv, > } > > /** > - * intel_enable_primary_plane - enable the primary plane on a given pipe > + * intel_enable_primary_hw_plane - enable the primary plane on a given pipe > * @dev_priv: i915 private structure > * @plane: plane to enable > * @pipe: pipe being fed > * > * Enable @plane on @pipe, making sure that @pipe is running first. > */ > -static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, > - enum plane plane, enum pipe pipe) > +static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv, > + enum plane plane, enum pipe pipe) > { > struct intel_crtc *intel_crtc = > to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); > @@ -1905,15 +1905,15 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, > } > > /** > - * intel_disable_primary_plane - disable the primary plane > + * intel_disable_primary_hw_plane - disable the primary hardware plane > * @dev_priv: i915 private structure > * @plane: plane to disable > * @pipe: pipe consuming the data > * > * Disable @plane; should be an independent operation. > */ > -static void intel_disable_primary_plane(struct drm_i915_private *dev_priv, > - enum plane plane, enum pipe pipe) > +static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv, > + enum plane plane, enum pipe pipe) > { > struct intel_crtc *intel_crtc = > to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); > @@ -2153,8 +2153,9 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc, > } > } > > -static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, > - int x, int y) > +static int i9xx_update_primary_plane(struct drm_crtc *crtc, > + struct drm_framebuffer *fb, > + int x, int y) > { > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = dev->dev_private; > @@ -2253,8 +2254,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, > return 0; > } > > -static int ironlake_update_plane(struct drm_crtc *crtc, > - struct drm_framebuffer *fb, int x, int y) > +static int ironlake_update_primary_plane(struct drm_crtc *crtc, > + struct drm_framebuffer *fb, > + int x, int y) > { > struct drm_device *dev = crtc->dev; > struct drm_i915_private *dev_priv = dev->dev_private; > @@ -2358,7 +2360,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, > dev_priv->display.disable_fbc(dev); > intel_increase_pllclock(crtc); > > - return dev_priv->display.update_plane(crtc, fb, x, y); > + return dev_priv->display.update_primary_plane(crtc, fb, x, y); > } > > void intel_display_handle_reset(struct drm_device *dev) > @@ -2398,10 +2400,10 @@ void intel_display_handle_reset(struct drm_device *dev) > * a NULL crtc->primary->fb. > */ > if (intel_crtc->active && crtc->primary->fb) > - dev_priv->display.update_plane(crtc, > - crtc->primary->fb, > - crtc->x, > - crtc->y); > + dev_priv->display.update_primary_plane(crtc, > + crtc->primary->fb, > + crtc->x, > + crtc->y); > mutex_unlock(&crtc->mutex); > } > } > @@ -2517,7 +2519,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, > intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay; > } > > - ret = dev_priv->display.update_plane(crtc, fb, x, y); > + ret = dev_priv->display.update_primary_plane(crtc, fb, x, y); > if (ret) { > mutex_lock(&dev->struct_mutex); > intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj); > @@ -3704,7 +3706,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) > > intel_update_watermarks(crtc); > intel_enable_pipe(intel_crtc); > - intel_enable_primary_plane(dev_priv, plane, pipe); > + intel_enable_primary_hw_plane(dev_priv, plane, pipe); > intel_enable_planes(crtc); > intel_crtc_update_cursor(crtc, true); > > @@ -3748,7 +3750,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc) > int pipe = intel_crtc->pipe; > int plane = intel_crtc->plane; > > - intel_enable_primary_plane(dev_priv, plane, pipe); > + intel_enable_primary_hw_plane(dev_priv, plane, pipe); > intel_enable_planes(crtc); > intel_crtc_update_cursor(crtc, true); > > @@ -3780,7 +3782,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc) > > intel_crtc_update_cursor(crtc, false); > intel_disable_planes(crtc); > - intel_disable_primary_plane(dev_priv, plane, pipe); > + intel_disable_primary_hw_plane(dev_priv, plane, pipe); > } > > /* > @@ -3908,7 +3910,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) > > intel_crtc_update_cursor(crtc, false); > intel_disable_planes(crtc); > - intel_disable_primary_plane(dev_priv, plane, pipe); > + intel_disable_primary_hw_plane(dev_priv, plane, pipe); > > if (intel_crtc->config.has_pch_encoder) > intel_set_pch_fifo_underrun_reporting(dev, pipe, false); > @@ -4391,7 +4393,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) > intel_update_watermarks(crtc); > intel_enable_pipe(intel_crtc); > intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); > - intel_enable_primary_plane(dev_priv, plane, pipe); > + intel_enable_primary_hw_plane(dev_priv, plane, pipe); > intel_enable_planes(crtc); > intel_crtc_update_cursor(crtc, true); > > @@ -4432,7 +4434,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) > intel_update_watermarks(crtc); > intel_enable_pipe(intel_crtc); > intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); > - intel_enable_primary_plane(dev_priv, plane, pipe); > + intel_enable_primary_hw_plane(dev_priv, plane, pipe); > intel_enable_planes(crtc); > /* The fixup needs to happen before cursor is enabled */ > if (IS_G4X(dev)) > @@ -4490,7 +4492,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) > intel_crtc_dpms_overlay(intel_crtc, false); > intel_crtc_update_cursor(crtc, false); > intel_disable_planes(crtc); > - intel_disable_primary_plane(dev_priv, plane, pipe); > + intel_disable_primary_hw_plane(dev_priv, plane, pipe); > > intel_set_cpu_fifo_underrun_reporting(dev, pipe, false); > intel_disable_pipe(dev_priv, pipe); > @@ -11034,7 +11036,8 @@ static void intel_init_display(struct drm_device *dev) > dev_priv->display.crtc_enable = haswell_crtc_enable; > dev_priv->display.crtc_disable = haswell_crtc_disable; > dev_priv->display.off = haswell_crtc_off; > - dev_priv->display.update_plane = ironlake_update_plane; > + dev_priv->display.update_primary_plane = > + ironlake_update_primary_plane; > } else if (HAS_PCH_SPLIT(dev)) { > dev_priv->display.get_pipe_config = ironlake_get_pipe_config; > dev_priv->display.get_plane_config = ironlake_get_plane_config; > @@ -11042,7 +11045,8 @@ static void intel_init_display(struct drm_device *dev) > dev_priv->display.crtc_enable = ironlake_crtc_enable; > dev_priv->display.crtc_disable = ironlake_crtc_disable; > dev_priv->display.off = ironlake_crtc_off; > - dev_priv->display.update_plane = ironlake_update_plane; > + dev_priv->display.update_primary_plane = > + ironlake_update_primary_plane; > } else if (IS_VALLEYVIEW(dev)) { > dev_priv->display.get_pipe_config = i9xx_get_pipe_config; > dev_priv->display.get_plane_config = i9xx_get_plane_config; > @@ -11050,7 +11054,8 @@ static void intel_init_display(struct drm_device *dev) > dev_priv->display.crtc_enable = valleyview_crtc_enable; > dev_priv->display.crtc_disable = i9xx_crtc_disable; > dev_priv->display.off = i9xx_crtc_off; > - dev_priv->display.update_plane = i9xx_update_plane; > + dev_priv->display.update_primary_plane = > + i9xx_update_primary_plane; > } else { > dev_priv->display.get_pipe_config = i9xx_get_pipe_config; > dev_priv->display.get_plane_config = i9xx_get_plane_config; > @@ -11058,7 +11063,8 @@ static void intel_init_display(struct drm_device *dev) > dev_priv->display.crtc_enable = i9xx_crtc_enable; > dev_priv->display.crtc_disable = i9xx_crtc_disable; > dev_priv->display.off = i9xx_crtc_off; > - dev_priv->display.update_plane = i9xx_update_plane; > + dev_priv->display.update_primary_plane = > + i9xx_update_primary_plane; > } > > /* Returns the core display clock speed */ > -- > 1.8.5.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 70fbe90..a937711 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -462,8 +462,9 @@ struct drm_i915_display_funcs { struct drm_framebuffer *fb, struct drm_i915_gem_object *obj, uint32_t flags); - int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb, - int x, int y); + int (*update_primary_plane)(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + int x, int y); void (*hpd_irq_setup)(struct drm_device *dev); /* clock updates for mode set */ /* cursor updates */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c2f3730..849a241 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1872,15 +1872,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv, } /** - * intel_enable_primary_plane - enable the primary plane on a given pipe + * intel_enable_primary_hw_plane - enable the primary plane on a given pipe * @dev_priv: i915 private structure * @plane: plane to enable * @pipe: pipe being fed * * Enable @plane on @pipe, making sure that @pipe is running first. */ -static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, - enum plane plane, enum pipe pipe) +static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv, + enum plane plane, enum pipe pipe) { struct intel_crtc *intel_crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); @@ -1905,15 +1905,15 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv, } /** - * intel_disable_primary_plane - disable the primary plane + * intel_disable_primary_hw_plane - disable the primary hardware plane * @dev_priv: i915 private structure * @plane: plane to disable * @pipe: pipe consuming the data * * Disable @plane; should be an independent operation. */ -static void intel_disable_primary_plane(struct drm_i915_private *dev_priv, - enum plane plane, enum pipe pipe) +static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv, + enum plane plane, enum pipe pipe) { struct intel_crtc *intel_crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); @@ -2153,8 +2153,9 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc, } } -static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, - int x, int y) +static int i9xx_update_primary_plane(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + int x, int y) { struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; @@ -2253,8 +2254,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb, return 0; } -static int ironlake_update_plane(struct drm_crtc *crtc, - struct drm_framebuffer *fb, int x, int y) +static int ironlake_update_primary_plane(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + int x, int y) { struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; @@ -2358,7 +2360,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, dev_priv->display.disable_fbc(dev); intel_increase_pllclock(crtc); - return dev_priv->display.update_plane(crtc, fb, x, y); + return dev_priv->display.update_primary_plane(crtc, fb, x, y); } void intel_display_handle_reset(struct drm_device *dev) @@ -2398,10 +2400,10 @@ void intel_display_handle_reset(struct drm_device *dev) * a NULL crtc->primary->fb. */ if (intel_crtc->active && crtc->primary->fb) - dev_priv->display.update_plane(crtc, - crtc->primary->fb, - crtc->x, - crtc->y); + dev_priv->display.update_primary_plane(crtc, + crtc->primary->fb, + crtc->x, + crtc->y); mutex_unlock(&crtc->mutex); } } @@ -2517,7 +2519,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay; } - ret = dev_priv->display.update_plane(crtc, fb, x, y); + ret = dev_priv->display.update_primary_plane(crtc, fb, x, y); if (ret) { mutex_lock(&dev->struct_mutex); intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj); @@ -3704,7 +3706,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_enable_pipe(intel_crtc); - intel_enable_primary_plane(dev_priv, plane, pipe); + intel_enable_primary_hw_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -3748,7 +3750,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc) int pipe = intel_crtc->pipe; int plane = intel_crtc->plane; - intel_enable_primary_plane(dev_priv, plane, pipe); + intel_enable_primary_hw_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -3780,7 +3782,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc) intel_crtc_update_cursor(crtc, false); intel_disable_planes(crtc); - intel_disable_primary_plane(dev_priv, plane, pipe); + intel_disable_primary_hw_plane(dev_priv, plane, pipe); } /* @@ -3908,7 +3910,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_crtc_update_cursor(crtc, false); intel_disable_planes(crtc); - intel_disable_primary_plane(dev_priv, plane, pipe); + intel_disable_primary_hw_plane(dev_priv, plane, pipe); if (intel_crtc->config.has_pch_encoder) intel_set_pch_fifo_underrun_reporting(dev, pipe, false); @@ -4391,7 +4393,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_enable_pipe(intel_crtc); intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); - intel_enable_primary_plane(dev_priv, plane, pipe); + intel_enable_primary_hw_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -4432,7 +4434,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_enable_pipe(intel_crtc); intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); - intel_enable_primary_plane(dev_priv, plane, pipe); + intel_enable_primary_hw_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); /* The fixup needs to happen before cursor is enabled */ if (IS_G4X(dev)) @@ -4490,7 +4492,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_crtc_dpms_overlay(intel_crtc, false); intel_crtc_update_cursor(crtc, false); intel_disable_planes(crtc); - intel_disable_primary_plane(dev_priv, plane, pipe); + intel_disable_primary_hw_plane(dev_priv, plane, pipe); intel_set_cpu_fifo_underrun_reporting(dev, pipe, false); intel_disable_pipe(dev_priv, pipe); @@ -11034,7 +11036,8 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.crtc_enable = haswell_crtc_enable; dev_priv->display.crtc_disable = haswell_crtc_disable; dev_priv->display.off = haswell_crtc_off; - dev_priv->display.update_plane = ironlake_update_plane; + dev_priv->display.update_primary_plane = + ironlake_update_primary_plane; } else if (HAS_PCH_SPLIT(dev)) { dev_priv->display.get_pipe_config = ironlake_get_pipe_config; dev_priv->display.get_plane_config = ironlake_get_plane_config; @@ -11042,7 +11045,8 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.crtc_enable = ironlake_crtc_enable; dev_priv->display.crtc_disable = ironlake_crtc_disable; dev_priv->display.off = ironlake_crtc_off; - dev_priv->display.update_plane = ironlake_update_plane; + dev_priv->display.update_primary_plane = + ironlake_update_primary_plane; } else if (IS_VALLEYVIEW(dev)) { dev_priv->display.get_pipe_config = i9xx_get_pipe_config; dev_priv->display.get_plane_config = i9xx_get_plane_config; @@ -11050,7 +11054,8 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.crtc_enable = valleyview_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; dev_priv->display.off = i9xx_crtc_off; - dev_priv->display.update_plane = i9xx_update_plane; + dev_priv->display.update_primary_plane = + i9xx_update_primary_plane; } else { dev_priv->display.get_pipe_config = i9xx_get_pipe_config; dev_priv->display.get_plane_config = i9xx_get_plane_config; @@ -11058,7 +11063,8 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.crtc_enable = i9xx_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; dev_priv->display.off = i9xx_crtc_off; - dev_priv->display.update_plane = i9xx_update_plane; + dev_priv->display.update_primary_plane = + i9xx_update_primary_plane; } /* Returns the core display clock speed */
The name 'update_plane' was used both for the primary plane functions in intel_display.c and the sprite/overlay functions in intel_sprite.c. Rename the primary plane functions to 'update_primary_plane' to avoid confusion. On a similar note, intel_display.c already had a function called intel_disable_primary_plane() that programs the hardware to disable a pipe's primary plane. When we hook up primary planes through the DRM plane interface, one of the natural handler names will be intel_primary_plane_disable(), which is very similar. To avoid confusion, rename the existing intel_disable_primary_plane() to intel_disable_primary_hw_plane() to make the two names a little more distinct. Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 5 +-- drivers/gpu/drm/i915/intel_display.c | 60 ++++++++++++++++++++---------------- 2 files changed, 36 insertions(+), 29 deletions(-)