diff mbox

[4/6] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg

Message ID 1395682207-7092-5-git-send-email-sourab.gupta@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sourab.gupta@intel.com March 24, 2014, 5:30 p.m. UTC 
From: Akash Goel <akash.goel@intel.com>

Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
VLV platform as it is not required.

Signed-off-by: Akash Goel <akash.goel@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Chris Wilson March 24, 2014, 5:47 p.m. UTC | #1 
On Mon, Mar 24, 2014 at 11:00:05PM +0530, sourab.gupta@intel.com wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
> VLV platform as it is not required.
> 
> Signed-off-by: Akash Goel <akash.goel@intel.com>

I've been running with this on ivb and hsw, and have not yet seen a
difference. So a tentative,
Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw
-Chris
sourab.gupta@intel.com March 24, 2014, 5:55 p.m. UTC | #2 
On Mon, 2014-03-24 at 17:47 +0000, Chris Wilson wrote:
> On Mon, Mar 24, 2014 at 11:00:05PM +0530, sourab.gupta@intel.com wrote:
> > From: Akash Goel <akash.goel@intel.com>
> > 
> > Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
> > VLV platform as it is not required.
> > 
> > Signed-off-by: Akash Goel <akash.goel@intel.com>
> 
> I've been running with this on ivb and hsw, and have not yet seen a
> difference. So a tentative,
> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw
> -Chris
> 
Hi Chris,
Right now this patch applies to vlv. So, in that case, should this be
applicable to Gen7 per se?
I'll float a new version, if reqd.

Regards,
Sourab
Chris Wilson March 24, 2014, 6:01 p.m. UTC | #3 
On Mon, Mar 24, 2014 at 05:55:22PM +0000, Gupta, Sourab wrote:
> On Mon, 2014-03-24 at 17:47 +0000, Chris Wilson wrote:
> > On Mon, Mar 24, 2014 at 11:00:05PM +0530, sourab.gupta@intel.com wrote:
> > > From: Akash Goel <akash.goel@intel.com>
> > > 
> > > Removing the VS_TIMER_DISPATCH bit enable for MI MODE reg for
> > > VLV platform as it is not required.
> > > 
> > > Signed-off-by: Akash Goel <akash.goel@intel.com>
> > 
> > I've been running with this on ivb and hsw, and have not yet seen a
> > difference. So a tentative,
> > Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw
> > -Chris
> > 
> Hi Chris,
> Right now this patch applies to vlv. So, in that case, should this be
> applicable to Gen7 per se?

Yes, meant to say, I was testing this applied to ivb and hsw (instead of
vlv).

> I'll float a new version, if reqd.

Thanks,
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index eb4811a..1512a71 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -599,7 +599,10 @@  static int init_render_ring(struct intel_ring_buffer *ring)
 	int ret = init_ring_common(ring);
 
 	if (INTEL_INFO(dev)->gen > 3)
-		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
+		/* FIXME, should also apply to ivb */
+		if (!IS_VALLEYVIEW(dev))
+			I915_WRITE(MI_MODE,
+					_MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
 
 	/* We need to disable the AsyncFlip performance optimisations in order
 	 * to use MI_WAIT_FOR_EVENT within the CS. It should already be