| Message ID | 1395223803-4714-3-git-send-email-george.cherian@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 03/19/2014 12:10 PM, George Cherian wrote: > Add USB and USB PHY reference clock data > > Signed-off-by: George Cherian <george.cherian@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> cheers, -roger > --- > arch/arm/boot/dts/am43xx-clocks.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi > index 142009c..5171d3e 100644 > --- a/arch/arm/boot/dts/am43xx-clocks.dtsi > +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi > @@ -653,4 +653,36 @@ > clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>; > reg = <0x4260>; > }; > + > + usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&usbphy_32khz_clkmux>; > + ti,bit-shift = <8>; > + reg = <0x2a40>; > + }; > + > + usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&usbphy_32khz_clkmux>; > + ti,bit-shift = <8>; > + reg = <0x2a48>; > + }; > + > + usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&dpll_per_clkdcoldo>; > + ti,bit-shift = <8>; > + reg = <0x8a60>; > + }; > + > + usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&dpll_per_clkdcoldo>; > + ti,bit-shift = <8>; > + reg = <0x8a68>; > + }; > }; > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Mar 19, 2014 at 03:40:00PM +0530, George Cherian wrote: > Add USB and USB PHY reference clock data > > Signed-off-by: George Cherian <george.cherian@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> > --- > arch/arm/boot/dts/am43xx-clocks.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi > index 142009c..5171d3e 100644 > --- a/arch/arm/boot/dts/am43xx-clocks.dtsi > +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi > @@ -653,4 +653,36 @@ > clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>; > reg = <0x4260>; > }; > + > + usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&usbphy_32khz_clkmux>; > + ti,bit-shift = <8>; > + reg = <0x2a40>; > + }; > + > + usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&usbphy_32khz_clkmux>; > + ti,bit-shift = <8>; > + reg = <0x2a48>; > + }; > + > + usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&dpll_per_clkdcoldo>; > + ti,bit-shift = <8>; > + reg = <0x8a60>; > + }; > + > + usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m { > + #clock-cells = <0>; > + compatible = "ti,gate-clock"; > + clocks = <&dpll_per_clkdcoldo>; > + ti,bit-shift = <8>; > + reg = <0x8a68>; > + }; > }; > -- > 1.8.3.1 >
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi index 142009c..5171d3e 100644 --- a/arch/arm/boot/dts/am43xx-clocks.dtsi +++ b/arch/arm/boot/dts/am43xx-clocks.dtsi @@ -653,4 +653,36 @@ clocks = <&clk_32768_ck>, <&clk_32k_tpm_ck>; reg = <0x4260>; }; + + usb_phy0_always_on_clk32k: usb_phy0_always_on_clk32k { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&usbphy_32khz_clkmux>; + ti,bit-shift = <8>; + reg = <0x2a40>; + }; + + usb_phy1_always_on_clk32k: usb_phy1_always_on_clk32k { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&usbphy_32khz_clkmux>; + ti,bit-shift = <8>; + reg = <0x2a48>; + }; + + usb_otg_ss0_refclk960m: usb_otg_ss0_refclk960m { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&dpll_per_clkdcoldo>; + ti,bit-shift = <8>; + reg = <0x8a60>; + }; + + usb_otg_ss1_refclk960m: usb_otg_ss1_refclk960m { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&dpll_per_clkdcoldo>; + ti,bit-shift = <8>; + reg = <0x8a68>; + }; };
Add USB and USB PHY reference clock data Signed-off-by: George Cherian <george.cherian@ti.com> --- arch/arm/boot/dts/am43xx-clocks.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)