diff mbox

[3/3] ARM: kprobes: Fix test code compilation errors for ARMv4 targets

Message ID 1394556894-18592-4-git-send-email-tixy@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jon Medhurst (Tixy) March 11, 2014, 4:54 p.m. UTC
Conditionally compile kprobes test cases for ARMv5 instructions to avoid
compilation errors with ARMv4 targets like:

/tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'

Signed-off-by: Jon Medhurst <tixy@linaro.org>
---
 arch/arm/kernel/kprobes-test-arm.c |    8 ++++++++
 1 file changed, 8 insertions(+)

Comments

David Long March 25, 2014, 1:27 p.m. UTC | #1
On 03/11/14 12:54, Jon Medhurst wrote:
> Conditionally compile kprobes test cases for ARMv5 instructions to avoid
> compilation errors with ARMv4 targets like:
>
> /tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'
>
> Signed-off-by: Jon Medhurst <tixy@linaro.org>
> ---
>   arch/arm/kernel/kprobes-test-arm.c |    8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
> index 8a7428b..f9ed7cf 100644
> --- a/arch/arm/kernel/kprobes-test-arm.c
> +++ b/arch/arm/kernel/kprobes-test-arm.c
> @@ -216,6 +216,7 @@ void kprobe_arm_test_cases(void)
>   	TEST_BB_R("bx	r",7,2f,"")
>   	TEST_BF_R("bxeq	r",14,2f,"")
>
> +#if __LINUX_ARM_ARCH__ >= 5
>   	TEST_R("clz	r0, r",0, 0x0,"")
>   	TEST_R("clzeq	r7, r",14,0x1,"")
>   	TEST_R("clz	lr, r",7, 0xffffffff,"")
> @@ -337,6 +338,7 @@ void kprobe_arm_test_cases(void)
>   	TEST_UNSUPPORTED(".word 0xe16f02e1 @ smultt pc, r1, r2")
>   	TEST_UNSUPPORTED(".word 0xe16002ef @ smultt r0, pc, r2")
>   	TEST_UNSUPPORTED(".word 0xe1600fe1 @ smultt r0, r1, pc")
> +#endif
>
>   	TEST_GROUP("Multiply and multiply-accumulate")
>
> @@ -559,6 +561,7 @@ void kprobe_arm_test_cases(void)
>   	TEST_UNSUPPORTED("ldrsht	r1, [r2], #48")
>   #endif
>
> +#if __LINUX_ARM_ARCH__ >= 5
>   	TEST_RPR(  "strd	r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
>   	TEST_RPR(  "strccd	r",8, VAL2,", [r",13,0, ", r",12,48,"]")
>   	TEST_RPR(  "strd	r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
> @@ -595,6 +598,7 @@ void kprobe_arm_test_cases(void)
>   	TEST_UNSUPPORTED(".word 0xe1efc3d0	@ ldrd r12, [pc, #48]!")
>   	TEST_UNSUPPORTED(".word 0xe0c9f3d0	@ ldrd pc, [r9], #48")
>   	TEST_UNSUPPORTED(".word 0xe0c9e3d0	@ ldrd lr, [r9], #48")
> +#endif
>
>   	TEST_GROUP("Miscellaneous")
>
> @@ -1227,7 +1231,9 @@ void kprobe_arm_test_cases(void)
>   	TEST_COPROCESSOR( "mrc"two"	0, 0, r0, cr0, cr0, 0")
>
>   	COPROCESSOR_INSTRUCTIONS_ST_LD("","e")
> +#if __LINUX_ARM_ARCH__ >= 5
>   	COPROCESSOR_INSTRUCTIONS_MC_MR("","e")
> +#endif
>   	TEST_UNSUPPORTED("svc	0")
>   	TEST_UNSUPPORTED("svc	0xffffff")
>
> @@ -1287,7 +1293,9 @@ void kprobe_arm_test_cases(void)
>   	TEST(	"blx	__dummy_thumb_subroutine_odd")
>   #endif /* __LINUX_ARM_ARCH__ >= 6 */
>
> +#if __LINUX_ARM_ARCH__ >= 5
>   	COPROCESSOR_INSTRUCTIONS_ST_LD("2","f")
> +#endif
>   #if __LINUX_ARM_ARCH__ >= 6
>   	COPROCESSOR_INSTRUCTIONS_MC_MR("2","f")
>   #endif
>

This looks OK to me.  Feel free to add my ack.

-dl
Arnd Bergmann March 25, 2014, 1:42 p.m. UTC | #2
On Tuesday 25 March 2014 09:27:29 David Long wrote:
> On 03/11/14 12:54, Jon Medhurst wrote:
> > Conditionally compile kprobes test cases for ARMv5 instructions to avoid
> > compilation errors with ARMv4 targets like:
> >
> > /tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'
> >
> > Signed-off-by: Jon Medhurst <tixy@linaro.org>
> 
> This looks OK to me.  Feel free to add my ack.

Ah, I had a similar patch in my 'randconfig-fixes' series. I noticed three
other configurations that are broken with kprobes-test:

- ARMv3 (enabled by ARCH_RPC)
- ARMv7-M (enabled by ARCH_EFM32)
- CPU_ENDIAN_BE32 (enabled by building a big-endian kernel on ARMv5 or older)

Should we treat those the same way, or just disable Kprobes for this case
if nobody cares?

	Arnd
Jon Medhurst (Tixy) March 25, 2014, 2:54 p.m. UTC | #3
On Tue, 2014-03-25 at 14:42 +0100, Arnd Bergmann wrote:
> On Tuesday 25 March 2014 09:27:29 David Long wrote:
> > On 03/11/14 12:54, Jon Medhurst wrote:
> > > Conditionally compile kprobes test cases for ARMv5 instructions to avoid
> > > compilation errors with ARMv4 targets like:
> > >
> > > /tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'
> > >
> > > Signed-off-by: Jon Medhurst <tixy@linaro.org>
> > 
> > This looks OK to me.  Feel free to add my ack.
> 
> Ah, I had a similar patch in my 'randconfig-fixes' series.

Where's that?

>  I noticed three
> other configurations that are broken with kprobes-test:
> 
> - ARMv3 (enabled by ARCH_RPC)

Didn't know we support < ARMv4!

> - ARMv7-M (enabled by ARCH_EFM32)

I guess that problem is because randconfig is enabling HAVE_KPROBES,
even though it wouldn't normally be selected, because we have

   config ARCH_ARM
	select HAVE_KPROBES if !XIP_KERNEL

and ARCH_EFM32 is XIP_KERNEL.

I think this problem goes all the way back to the commit which added
HAVE_KPROBES to all arches (3f550096dede4430f83b16457da83bf429155ac2)
That replaced 

   config KPROBES
	depends on ... (ARM && !XIP_KERNEL)

with the current select if !XIP_KERNEL, which made it possible to enable
kprobes for XIP when before we couldn't. And presumably that was for a
good reason like it doesn't work on XIP?

Not sure at the moment how best to fix that. (Making ARM_KPROBES_TEST
depend on !XIP_KERNEL doesn't solve the underlying problem of KPROBES
feature still being enabled for XIP kernels.)

> - CPU_ENDIAN_BE32 (enabled by building a big-endian kernel on ARMv5 or older)

> Should we treat those the same way, or just disable Kprobes for this case
> if nobody cares?

For CPU_ENDIAN_BE32 I have a feeling that the kprobes code wouldn't
work, would have to think more about why I have that feeling. If it
doesn't, we come back to the problem that arch code can't add
dependencies to CONFIG_KPROBES as things stand.
Arnd Bergmann March 25, 2014, 3:17 p.m. UTC | #4
On Tuesday 25 March 2014 14:54:44 Jon Medhurst wrote:
> On Tue, 2014-03-25 at 14:42 +0100, Arnd Bergmann wrote:
> > On Tuesday 25 March 2014 09:27:29 David Long wrote:
> > > On 03/11/14 12:54, Jon Medhurst wrote:
> > > > Conditionally compile kprobes test cases for ARMv5 instructions to avoid
> > > > compilation errors with ARMv4 targets like:
> > > >
> > > > /tmp/cc7Tx8ST.s:16740: Error: selected processor does not support ARM mode `clz r0,r0'
> > > >
> > > > Signed-off-by: Jon Medhurst <tixy@linaro.org>
> > > 
> > > This looks OK to me.  Feel free to add my ack.
> > 
> > Ah, I had a similar patch in my 'randconfig-fixes' series.
> 
> Where's that?

http://git.kernel.org/cgit/linux/kernel/git/arnd/playground.git/commit/?h=arm-randconfig

> >  I noticed three
> > other configurations that are broken with kprobes-test:
> > 
> > - ARMv3 (enabled by ARCH_RPC)
> 
> Didn't know we support < ARMv4!

We don't really (any more). RPC is a v4 CPU, but we build the kernel
pretending it is v3 to work around some issue I don't remember.

> > - ARMv7-M (enabled by ARCH_EFM32)
> 
> I guess that problem is because randconfig is enabling HAVE_KPROBES,
> even though it wouldn't normally be selected, because we have
> 
>    config ARCH_ARM
> 	select HAVE_KPROBES if !XIP_KERNEL
> 
> and ARCH_EFM32 is XIP_KERNEL.

Right. EFM32 can in theory run without XIP_KERNEL, but the only
board we support doesn't have enough RAM for that.

> I think this problem goes all the way back to the commit which added
> HAVE_KPROBES to all arches (3f550096dede4430f83b16457da83bf429155ac2)
> That replaced 
> 
>    config KPROBES
> 	depends on ... (ARM && !XIP_KERNEL)
> 
> with the current select if !XIP_KERNEL, which made it possible to enable
> kprobes for XIP when before we couldn't. And presumably that was for a
> good reason like it doesn't work on XIP?

The text segment is very read-only in XIP_KERNEL, so anything that tries
to overwrite instructions can't work.

> Not sure at the moment how best to fix that. (Making ARM_KPROBES_TEST
> depend on !XIP_KERNEL doesn't solve the underlying problem of KPROBES
> feature still being enabled for XIP kernels.)

Regardless of XIP, there is the other problem of ARMv7-M support, which
in particular only has THUMB2 instructions:

  CC      arch/arm/kernel/kprobes.o
/tmp/cclbjgU2.s: Assembler messages:
	/tmp/cclbjgU2.s:701: Error: selected processor does not support Thumb mode `rfeia sp!'
make[3]: *** [arch/arm/kernel/kprobes.o] Error 1
  CC      arch/arm/kernel/kprobes-thumb.o
/tmp/ccwlnR1o.s: Assembler messages:
/tmp/ccwlnR1o.s:315: Error: selected processor does not support requested special purpose register -- `msr cpsr_fs,r0'
/tmp/ccwlnR1o.s:317: Error: selected processor does not support requested special purpose register -- `mrs r0,cpsr'
/tmp/ccwlnR1o.s:673: Error: selected processor does not support requested special purpose register -- `msr cpsr_fs,r3'
/tmp/ccwlnR1o.s:675: Error: selected processor does not support requested special purpose register -- `mrs r3,cpsr'
/tmp/ccwlnR1o.s:919: Error: selected processor does not support requested special purpose register -- `msr cpsr_fs,r8'
/tmp/ccwlnR1o.s:923: Error: selected processor does not support requested special purpose register -- `mrs r9,cpsr'
/tmp/ccwlnR1o.s:960: Error: selected processor does not support requested special purpose register -- `msr cpsr_fs,r8'
/tmp/ccwlnR1o.s:964: Error: selected processor does not support requested special purpose register -- `mrs r9,cpsr'
make[3]: *** [arch/arm/kernel/kprobes-thumb.o] Error 1
  CC      arch/arm/kernel/kprobes-test.o
/tmp/ccVIP6jA.s: Assembler messages:
/tmp/ccVIP6jA.s:1354: Error: selected processor does not support ARM opcodes
/tmp/ccVIP6jA.s:1355: Error: attempt to use an ARM instruction on a Thumb-only processor -- `orr lr,lr,#1'
/tmp/ccVIP6jA.s:1356: Error: attempt to use an ARM instruction on a Thumb-only processor -- `ldr pc,1f'
make[3]: *** [arch/arm/kernel/kprobes-test.o] Error 1
  CC      arch/arm/kernel/kprobes-test-thumb.o
/tmp/ccN8WTB4.s: Assembler messages:
/tmp/ccN8WTB4.s:2032: Error: selected processor does not support ARM opcodes
/tmp/ccN8WTB4.s:2033: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr lr,2f+1'
/tmp/ccN8WTB4.s:2034: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx lr'
/tmp/ccN8WTB4.s:4183: Error: selected processor does not support ARM opcodes
/tmp/ccN8WTB4.s:4184: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr lr,2f+1'
/tmp/ccN8WTB4.s:4185: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx lr'
/tmp/ccN8WTB4.s:4222: Error: selected processor does not support ARM opcodes
/tmp/ccN8WTB4.s:4223: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr lr,2f+1'
/tmp/ccN8WTB4.s:4224: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx lr'
/tmp/ccN8WTB4.s:5618: Error: selected processor does not support Thumb mode `rfedb sp'
/tmp/ccN8WTB4.s:5639: Error: selected processor does not support Thumb mode `rfeia sp'
/tmp/ccN8WTB4.s:5660: Error: selected processor does not support Thumb mode `rfedb sp!'
/tmp/ccN8WTB4.s:5681: Error: selected processor does not support Thumb mode `rfeia sp!'
/tmp/ccN8WTB4.s:6489: Error: selected processor does not support ARM opcodes
/tmp/ccN8WTB4.s:6490: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr lr,2f+1'
/tmp/ccN8WTB4.s:6491: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx lr'
/tmp/ccN8WTB4.s:6528: Error: selected processor does not support ARM opcodes
/tmp/ccN8WTB4.s:6529: Error: attempt to use an ARM instruction on a Thumb-only processor -- `adr lr,2f+1'
/tmp/ccN8WTB4.s:6530: Error: attempt to use an ARM instruction on a Thumb-only processor -- `bx lr'
/tmp/ccN8WTB4.s:7521: Error: selected processor does not support Thumb mode `strexd r0,r1,[r2]'
/tmp/ccN8WTB4.s:7584: Error: selected processor does not support Thumb mode `ldrexd r0,[r1]'
/tmp/ccN8WTB4.s:15321: Error: selected processor does not support Thumb mode `pkhbt r0,r0,r1'
/tmp/ccN8WTB4.s:15350: Error: selected processor does not support Thumb mode `pkhbt r14,r12,r10,lsl#2'
/tmp/ccN8WTB4.s:15379: Error: selected processor does not support Thumb mode `pkhtb r0,r0,r1'
/tmp/ccN8WTB4.s:15408: Error: selected processor does not support Thumb mode `pkhtb r14,r12,r10,asr#2'
/tmp/ccN8WTB4.s:18355: Error: selected processor does not support Thumb mode `ssat16 r0,#12,r0'

> > - CPU_ENDIAN_BE32 (enabled by building a big-endian kernel on ARMv5 or older)
> 
> > Should we treat those the same way, or just disable Kprobes for this case
> > if nobody cares?
> 
> For CPU_ENDIAN_BE32 I have a feeling that the kprobes code wouldn't
> work, would have to think more about why I have that feeling. If it
> doesn't, we come back to the problem that arch code can't add
> dependencies to CONFIG_KPROBES as things stand.

The error message I get here is

arnd@wuerfel:~/arm-soc$ make O=build/0xCD5BF01B_defconfig/  -skj40
/git/arm-soc/Makefile:629: Cannot use CONFIG_CC_STACKPROTECTOR_STRONG: -fstack-protector-strong not supported by compiler
/git/arm-soc/arch/arm/kernel/patch.c: In function '__patch_text':
/git/arm-soc/arch/arm/kernel/patch.c:35:4: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration]
    insn = __opcode_to_mem_thumb32(insn);
    ^


I've filed that for now in the "wontfix" category, but I though I'd bring
it up anyway.

	Arnd
diff mbox

Patch

diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 8a7428b..f9ed7cf 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -216,6 +216,7 @@  void kprobe_arm_test_cases(void)
 	TEST_BB_R("bx	r",7,2f,"")
 	TEST_BF_R("bxeq	r",14,2f,"")
 
+#if __LINUX_ARM_ARCH__ >= 5
 	TEST_R("clz	r0, r",0, 0x0,"")
 	TEST_R("clzeq	r7, r",14,0x1,"")
 	TEST_R("clz	lr, r",7, 0xffffffff,"")
@@ -337,6 +338,7 @@  void kprobe_arm_test_cases(void)
 	TEST_UNSUPPORTED(".word 0xe16f02e1 @ smultt pc, r1, r2")
 	TEST_UNSUPPORTED(".word 0xe16002ef @ smultt r0, pc, r2")
 	TEST_UNSUPPORTED(".word 0xe1600fe1 @ smultt r0, r1, pc")
+#endif
 
 	TEST_GROUP("Multiply and multiply-accumulate")
 
@@ -559,6 +561,7 @@  void kprobe_arm_test_cases(void)
 	TEST_UNSUPPORTED("ldrsht	r1, [r2], #48")
 #endif
 
+#if __LINUX_ARM_ARCH__ >= 5
 	TEST_RPR(  "strd	r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
 	TEST_RPR(  "strccd	r",8, VAL2,", [r",13,0, ", r",12,48,"]")
 	TEST_RPR(  "strd	r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
@@ -595,6 +598,7 @@  void kprobe_arm_test_cases(void)
 	TEST_UNSUPPORTED(".word 0xe1efc3d0	@ ldrd r12, [pc, #48]!")
 	TEST_UNSUPPORTED(".word 0xe0c9f3d0	@ ldrd pc, [r9], #48")
 	TEST_UNSUPPORTED(".word 0xe0c9e3d0	@ ldrd lr, [r9], #48")
+#endif
 
 	TEST_GROUP("Miscellaneous")
 
@@ -1227,7 +1231,9 @@  void kprobe_arm_test_cases(void)
 	TEST_COPROCESSOR( "mrc"two"	0, 0, r0, cr0, cr0, 0")
 
 	COPROCESSOR_INSTRUCTIONS_ST_LD("","e")
+#if __LINUX_ARM_ARCH__ >= 5
 	COPROCESSOR_INSTRUCTIONS_MC_MR("","e")
+#endif
 	TEST_UNSUPPORTED("svc	0")
 	TEST_UNSUPPORTED("svc	0xffffff")
 
@@ -1287,7 +1293,9 @@  void kprobe_arm_test_cases(void)
 	TEST(	"blx	__dummy_thumb_subroutine_odd")
 #endif /* __LINUX_ARM_ARCH__ >= 6 */
 
+#if __LINUX_ARM_ARCH__ >= 5
 	COPROCESSOR_INSTRUCTIONS_ST_LD("2","f")
+#endif
 #if __LINUX_ARM_ARCH__ >= 6
 	COPROCESSOR_INSTRUCTIONS_MC_MR("2","f")
 #endif