| Message ID | 1396967803-28868-3-git-send-email-gautam.vivek@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 08.04.2014 16:36, Vivek Gautam wrote: > Add device tree nodes for USB 3.0 PHY present alongwith > USB 3.0 controller Exynos 5420 SoC. This phy driver is > based on generic phy framework. > > Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> > --- > arch/arm/boot/dts/exynos5420.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index 8db792b..a6efb52 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -652,4 +652,24 @@ > clocks = <&clock 319>, <&clock 318>; > clock-names = "tmu_apbif", "tmu_triminfo_apbif"; > }; > + > + usbdrd_phy0: phy@12100000 { > + compatible = "samsung,exynos5420-usbdrd-phy"; > + reg = <0x12100000 0x100>; > + clocks = <&clock 366>, <&clock 1>, <&clock 152>; > + clock-names = "phy", "ref", "usb30_sclk_100m"; As I mentioned in another reply, please make sure that "usb30_sclk_100m" isn't simply a gate clock for "ref" clock. Otherwise, Reviewed-by: Tomasz Figa <t.figa@samsung.com> -- Best regards, Tomasz
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8db792b..a6efb52 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -652,4 +652,24 @@ clocks = <&clock 319>, <&clock 318>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; }; + + usbdrd_phy0: phy@12100000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12100000 0x100>; + clocks = <&clock 366>, <&clock 1>, <&clock 152>; + clock-names = "phy", "ref", "usb30_sclk_100m"; + samsung,syscon-phandle = <&pmu_system_controller>; + samsung,pmu-offset = <0x704>; + #phy-cells = <1>; + }; + + usbdrd_phy1: phy@12500000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12500000 0x100>; + clocks = <&clock 367>, <&clock 1>, <&clock 153>; + clock-names = "phy", "ref", "usb30_sclk_100m"; + samsung,syscon-phandle = <&pmu_system_controller>; + samsung,pmu-offset = <0x708>; + #phy-cells = <1>; + }; };
Add device tree nodes for USB 3.0 PHY present alongwith USB 3.0 controller Exynos 5420 SoC. This phy driver is based on generic phy framework. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> --- arch/arm/boot/dts/exynos5420.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)