diff mbox

[V5,1/3] arm: dts: dra7: Add crossbar device binding

Message ID 1399384579-25620-2-git-send-email-r.sricharan@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

R Sricharan May 6, 2014, 1:56 p.m. UTC
This adds the irq crossbar device node.

There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.

Cc: Benoit Cousson <bcousson@baylibre.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
[V5] Rebased on top of 3.15-rc4 and corrected the
     irqs-reserved list

 arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Felipe Balbi May 6, 2014, 7:40 p.m. UTC | #1
On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote:
> This adds the irq crossbar device node.
> 
> There is a IRQ crossbar device in the soc, which
> maps the irq requests from the peripherals to the
> mpu interrupt controller's inputs. The Peripheral irq
> requests are connected to only one crossbar
> input and the output of the crossbar is connected to only one
> controller's input line. The crossbar device is used to map
> a peripheral input to a free mpu's interrupt controller line.
> 
> Cc: Benoit Cousson <bcousson@baylibre.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Cc: Rajendra Nayak <rnayak@ti.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Sricharan R <r.sricharan@ti.com>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> ---
> [V5] Rebased on top of 3.15-rc4 and corrected the
>      irqs-reserved list
> 
>  arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 149b550..0274a86 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -790,6 +790,14 @@
>  			status = "disabled";
>  		};
>  	};
> +
> +	crossbar_mpu: crossbar@4a020000 {

shouldn't this be "status = disabled"; so that boards enable this
on-demand ??
Nishanth Menon May 6, 2014, 7:46 p.m. UTC | #2
On 05/06/2014 02:40 PM, Felipe Balbi wrote:
> On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote:
>> This adds the irq crossbar device node.
>>
>> There is a IRQ crossbar device in the soc, which
>> maps the irq requests from the peripherals to the
>> mpu interrupt controller's inputs. The Peripheral irq
>> requests are connected to only one crossbar
>> input and the output of the crossbar is connected to only one
>> controller's input line. The crossbar device is used to map
>> a peripheral input to a free mpu's interrupt controller line.
>>
>> Cc: Benoit Cousson <bcousson@baylibre.com>
>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Cc: Rajendra Nayak <rnayak@ti.com>
>> Cc: Tony Lindgren <tony@atomide.com>
>> Signed-off-by: Sricharan R <r.sricharan@ti.com>
>> Signed-off-by: Nishanth Menon <nm@ti.com>
>> ---
>> [V5] Rebased on top of 3.15-rc4 and corrected the
>>      irqs-reserved list
>>
>>  arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 149b550..0274a86 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
>> @@ -790,6 +790,14 @@
>>  			status = "disabled";
>>  		};
>>  	};
>> +
>> +	crossbar_mpu: crossbar@4a020000 {
> 
> shouldn't this be "status = disabled"; so that boards enable this
> on-demand ??
> 
It cannot be and does not need to be. crossbar is an SoC feature. by
defining crossbar, the IRQ numbers we provide in DTS now becomes
crossbar numbers which get mapped to GIC interrupt numbers dynamically.

further crossbar is not a board feature. it is as ingrained in DRA7
behavior as GIC is. we are fortunate that we have some default mapping
of crossbar that allows the current peripherals to work, with this
support, we dont have to depend any longer on "we are lucky that is
mapped".

That said, in hindsight, patch #1 and 2 should be squashed IMHO. else
we have a bisectability problem here.
Etheridge, Darren May 6, 2014, 7:58 p.m. UTC | #3
Nishanth Menon <nm@ti.com> wrote on Tue [2014-May-06 14:46:10 -0500]:
> On 05/06/2014 02:40 PM, Felipe Balbi wrote:
> > On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote:
> >> This adds the irq crossbar device node.
> >>
> >> There is a IRQ crossbar device in the soc, which
> >> maps the irq requests from the peripherals to the
> >> mpu interrupt controller's inputs. The Peripheral irq
> >> requests are connected to only one crossbar
> >> input and the output of the crossbar is connected to only one
> >> controller's input line. The crossbar device is used to map
> >> a peripheral input to a free mpu's interrupt controller line.
> >>
> >> Cc: Benoit Cousson <bcousson@baylibre.com>
> >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> >> Cc: Rajendra Nayak <rnayak@ti.com>
> >> Cc: Tony Lindgren <tony@atomide.com>
> >> Signed-off-by: Sricharan R <r.sricharan@ti.com>
> >> Signed-off-by: Nishanth Menon <nm@ti.com>
> >> ---
> >> [V5] Rebased on top of 3.15-rc4 and corrected the
> >>      irqs-reserved list
> >>
> >>  arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
> >>  1 file changed, 8 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >> index 149b550..0274a86 100644
> >> --- a/arch/arm/boot/dts/dra7.dtsi
> >> +++ b/arch/arm/boot/dts/dra7.dtsi
> >> @@ -790,6 +790,14 @@
> >>  			status = "disabled";
> >>  		};
> >>  	};
> >> +
> >> +	crossbar_mpu: crossbar@4a020000 {
> > 
> > shouldn't this be "status = disabled"; so that boards enable this
> > on-demand ??
> > 
> It cannot be and does not need to be. crossbar is an SoC feature. by
> defining crossbar, the IRQ numbers we provide in DTS now becomes
> crossbar numbers which get mapped to GIC interrupt numbers dynamically.
> 
> further crossbar is not a board feature. it is as ingrained in DRA7
> behavior as GIC is. we are fortunate that we have some default mapping
> of crossbar that allows the current peripherals to work, with this
> support, we dont have to depend any longer on "we are lucky that is
> mapped".
> 
> That said, in hindsight, patch #1 and 2 should be squashed IMHO. else
> we have a bisectability problem here.
> 
Yes the bisectability problem is completely true - I was just testing
that as your email came in.  In fact I think all three patches need to
be squashed into one, I can't boot the dra7-EVM unless I have all three
patches applied.

With all three patches applied, basic boot is looking good.  I will
reply with my tested-by once I have got VIP, etc up and running.

Darren

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Etheridge, Darren May 6, 2014, 8:07 p.m. UTC | #4
Darren Etheridge <detheridge@ti.com> wrote on Tue [2014-May-06 14:58:04 -0500]:
> Nishanth Menon <nm@ti.com> wrote on Tue [2014-May-06 14:46:10 -0500]:
> > On 05/06/2014 02:40 PM, Felipe Balbi wrote:
> > > On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote:
> > >> This adds the irq crossbar device node.
> > >>
> > >> There is a IRQ crossbar device in the soc, which
> > >> maps the irq requests from the peripherals to the
> > >> mpu interrupt controller's inputs. The Peripheral irq
> > >> requests are connected to only one crossbar
> > >> input and the output of the crossbar is connected to only one
> > >> controller's input line. The crossbar device is used to map
> > >> a peripheral input to a free mpu's interrupt controller line.
> > >>
> > >> Cc: Benoit Cousson <bcousson@baylibre.com>
> > >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > >> Cc: Rajendra Nayak <rnayak@ti.com>
> > >> Cc: Tony Lindgren <tony@atomide.com>
> > >> Signed-off-by: Sricharan R <r.sricharan@ti.com>
> > >> Signed-off-by: Nishanth Menon <nm@ti.com>
> > >> ---
> > >> [V5] Rebased on top of 3.15-rc4 and corrected the
> > >>      irqs-reserved list
> > >>
> > >>  arch/arm/boot/dts/dra7.dtsi |    8 ++++++++
> > >>  1 file changed, 8 insertions(+)
> > >>
> > >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> > >> index 149b550..0274a86 100644
> > >> --- a/arch/arm/boot/dts/dra7.dtsi
> > >> +++ b/arch/arm/boot/dts/dra7.dtsi
> > >> @@ -790,6 +790,14 @@
> > >>  			status = "disabled";
> > >>  		};
> > >>  	};
> > >> +
> > >> +	crossbar_mpu: crossbar@4a020000 {
> > > 
> > > shouldn't this be "status = disabled"; so that boards enable this
> > > on-demand ??
> > > 
> > It cannot be and does not need to be. crossbar is an SoC feature. by
> > defining crossbar, the IRQ numbers we provide in DTS now becomes
> > crossbar numbers which get mapped to GIC interrupt numbers dynamically.
> > 
> > further crossbar is not a board feature. it is as ingrained in DRA7
> > behavior as GIC is. we are fortunate that we have some default mapping
> > of crossbar that allows the current peripherals to work, with this
> > support, we dont have to depend any longer on "we are lucky that is
> > mapped".
> > 
> > That said, in hindsight, patch #1 and 2 should be squashed IMHO. else
> > we have a bisectability problem here.
> > 
> Yes the bisectability problem is completely true - I was just testing
> that as your email came in.  In fact I think all three patches need to
> be squashed into one, I can't boot the dra7-EVM unless I have all three
> patches applied.
> 

Or I just tried reordering, so patch 3/3 becomes patch 1 and then squash
patch 1/3 and patch 2/3 together to form patch 2.  That seems to at
least let the kernel boot to completion.

Darren
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 149b550..0274a86 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -790,6 +790,14 @@ 
 			status = "disabled";
 		};
 	};
+
+	crossbar_mpu: crossbar@4a020000 {
+		compatible = "ti,irq-crossbar";
+		reg = <0x4a002a48 0x130>;
+		ti,max-irqs = <160>;
+		ti,reg-size = <2>;
+		ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
+	};
 };
 
 /include/ "dra7xx-clocks.dtsi"