| Message ID | 1399383244-14556-12-git-send-email-kishon@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
Hi Kishon, On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote: > Added missing 32khz clock used by PCIe PHY. > The documention for this node can be found @ ../bindings/clock/ti/gate.txt. Typo in $subject s/clocks/clock -- cheers, -roger > > Cc: Tony Lindgren <tony@atomide.com> > Cc: Rajendra Nayak <rnayak@ti.com> > Cc: Tero Kristo <t-kristo@ti.com> > Cc: Paul Walmsley <paul@pwsan.com> > Cc: Rob Herring <robh+dt@kernel.org> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi > index 44993ec..e1bd052 100644 > --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi > +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi > @@ -1165,6 +1165,14 @@ > reg = <0x021c>, <0x0220>; > }; > > + optfclk_pciephy_32khz: optfclk_pciephy_32khz@4a0093b0 { > + compatible = "ti,gate-clock"; > + clocks = <&sys_32k_ck>; > + #clock-cells = <0>; > + reg = <0x13b0>; > + ti,bit-shift = <8>; > + }; > + > optfclk_pciephy_div: optfclk_pciephy_div@4a00821c { > compatible = "ti,divider-clock"; > clocks = <&apll_pcie_ck>; > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wednesday 14 May 2014 06:53 PM, Roger Quadros wrote: > Hi Kishon, > > > On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote: >> Added missing 32khz clock used by PCIe PHY. >> The documention for this node can be found @ ../bindings/clock/ti/gate.txt. > > Typo in $subject > s/clocks/clock Will fix it. Thanks Kishon > > -- > cheers, > -roger > >> >> Cc: Tony Lindgren <tony@atomide.com> >> Cc: Rajendra Nayak <rnayak@ti.com> >> Cc: Tero Kristo <t-kristo@ti.com> >> Cc: Paul Walmsley <paul@pwsan.com> >> Cc: Rob Herring <robh+dt@kernel.org> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi >> index 44993ec..e1bd052 100644 >> --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi >> +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi >> @@ -1165,6 +1165,14 @@ >> reg = <0x021c>, <0x0220>; >> }; >> >> + optfclk_pciephy_32khz: optfclk_pciephy_32khz@4a0093b0 { >> + compatible = "ti,gate-clock"; >> + clocks = <&sys_32k_ck>; >> + #clock-cells = <0>; >> + reg = <0x13b0>; >> + ti,bit-shift = <8>; >> + }; >> + >> optfclk_pciephy_div: optfclk_pciephy_div@4a00821c { >> compatible = "ti,divider-clock"; >> clocks = <&apll_pcie_ck>; >> > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 44993ec..e1bd052 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1165,6 +1165,14 @@ reg = <0x021c>, <0x0220>; }; + optfclk_pciephy_32khz: optfclk_pciephy_32khz@4a0093b0 { + compatible = "ti,gate-clock"; + clocks = <&sys_32k_ck>; + #clock-cells = <0>; + reg = <0x13b0>; + ti,bit-shift = <8>; + }; + optfclk_pciephy_div: optfclk_pciephy_div@4a00821c { compatible = "ti,divider-clock"; clocks = <&apll_pcie_ck>;
Added missing 32khz clock used by PCIe PHY. The documention for this node can be found @ ../bindings/clock/ti/gate.txt. Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)