| Message ID | d45ec5351ce8ef03256061bdc4b0ba673bd40c66.1400001937.git.stefan@agner.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 05/13/2014 11:27 AM, stefan@agner.ch wrote: > This patch adds the device tree to support Toradex Colibri T30, a > computer on module which can be used on different carrier boards. > > The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC, > a LM95245 temperature sensor and an AX88772B USB Ethernet > Controller. Furthermore, there is a STMPE811 and SGTL5000 audio > codec which are not yet supported. Anything that is not self > contained on the module is disabled by default. > > The device tree for the Evaluation Board includes the modules > device tree and enables the supported pheripherials of the carrier > board (the Evaluation Board supports almost all of them). > diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts > +#include "tegra30-colibri.dtsi" > + > +/ { > + model = "Toradex Colibri T30 on Colibri Evaluation Board"; > + compatible = "toradex,colibri_t30-eval-v3", "nvidia,tegra30"; That should include all the compatible values "inherited" from the Colibri T30 module .dtsi file too. > + aliases { > + rtc0 = "/i2c@7000c000/rtc@68"; > + rtc1 = "/i2c@7000d000/tps65911@2d"; > + rtc2 = "/rtc@7000e000"; > + }; Wow, no shortage of RTCs! > + /* SPI1: Colibri SSP */ > + spi@7000d400 { > + status = "okay"; > + spi-max-frequency = <25000000>; > + can0: can@0 { > + compatible = "microchip,mcp2515"; > + reg = <0>; > + clocks = <&clk16m>; > + interrupt-parent = <&gpio>; > + interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; > + spi-max-frequency = <10000000>; So this chip doesn't get confused by a faster clock frequency when its chip-select line isn't asserted? I would have expected spi-max-frequency for the bus to be the minimum value that any device on the bus would tolerate. > + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ > + usb@7d000000 { > + status = "okay"; > + dr_mode = "otg"; The dr_mode property is only for the PHY node. > + panel: panel { > + compatible = "edt,et057090dhu", "simple-panel"; The panel-simple driver doesn't seem to know about that EDT panel. How will it work out the display timings? > diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi > +/ { > + model = "Toradex Colibri T30"; > + compatible = "toradex,colibri_t30-v11b", > + "toradex,colibri_t30-v11c", > + "toradex,colibri_t30-v11d", > + "toradex,colibri_t30", "nvidia,tegra30"; Do we really need all those compatible values? If those board revisions are all SW-compatible, then you may as well write just: compatible = "toradex,colibri_t30", "nvidia,tegra30"; > + aliases { > + serial0 = &uarta; > + serial1 = &uartd; > + serial2 = &uartb; > + }; tegra20.dtsi already sets the alias names for the serial ports. Previous discussions settled on giving each on-chip UART a static name, rather than renaming them per board. > + pmc@7000e400 { > + status = "okay"; The PMC node isn't disabled in tegra20.dtsi, so you don't need the status property here.
On 05/13/2014 09:49 PM, Stephen Warren wrote: > On 05/13/2014 11:27 AM, stefan@agner.ch wrote: >> This patch adds the device tree to support Toradex Colibri T30, a >> computer on module which can be used on different carrier boards. >> >> The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC, >> a LM95245 temperature sensor and an AX88772B USB Ethernet >> Controller. Furthermore, there is a STMPE811 and SGTL5000 audio >> codec which are not yet supported. Anything that is not self >> contained on the module is disabled by default. >> >> The device tree for the Evaluation Board includes the modules >> device tree and enables the supported pheripherials of the carrier >> board (the Evaluation Board supports almost all of them). > >> diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts > >> +#include "tegra30-colibri.dtsi" >> + >> +/ { >> + model = "Toradex Colibri T30 on Colibri Evaluation Board"; >> + compatible = "toradex,colibri_t30-eval-v3", "nvidia,tegra30"; > > That should include all the compatible values "inherited" from the > Colibri T30 module .dtsi file too. > >> + aliases { >> + rtc0 = "/i2c@7000c000/rtc@68"; >> + rtc1 = "/i2c@7000d000/tps65911@2d"; >> + rtc2 = "/rtc@7000e000"; >> + }; > > Wow, no shortage of RTCs! Yes (;-p). Please understand however that there are certain limitation if it comes to real-time clocks: The first one is the ultra low-power RTC available on the carrier board. The second one is PMIC integrated usually drawing much more current that the first dedicated one. The third one is Tegra SoC internal and won't keep the time across power-cycles in our design. >> + /* SPI1: Colibri SSP */ >> + spi@7000d400 { >> + status = "okay"; >> + spi-max-frequency = <25000000>; >> + can0: can@0 { >> + compatible = "microchip,mcp2515"; >> + reg = <0>; >> + clocks = <&clk16m>; >> + interrupt-parent = <&gpio>; >> + interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; >> + spi-max-frequency = <10000000>; > > So this chip doesn't get confused by a faster clock frequency when its > chip-select line isn't asserted? I would have expected spi-max-frequency > for the bus to be the minimum value that any device on the bus would > tolerate. No SPI chip should ever get confused like that as long as they are chip select gated. At least by the traditional chip select meaning as opposed to NVIDIA's designers taking the term chip select a little too personal: they indeed only select a chip otherwise all the chip select pins are just left floating! >> + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ >> + usb@7d000000 { >> + status = "okay"; >> + dr_mode = "otg"; > > The dr_mode property is only for the PHY node. > >> + panel: panel { >> + compatible = "edt,et057090dhu", "simple-panel"; > > The panel-simple driver doesn't seem to know about that EDT panel. How > will it work out the display timings? Good question and me and Stefan actually even talked about that yesterday. I am actually using KMS right now as follows: video=HDMI-A-1:1280x720-16@60 video=LVDS-1:640x480-16@60' So the panel node is purely used to hook up the back light part right now. From our point of view for our completely generic module approach where each customer potentially hooks up his own display make/model it would be desirable to have some way of defining such timings directly through the device tree. >> diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi > >> +/ { >> + model = "Toradex Colibri T30"; >> + compatible = "toradex,colibri_t30-v11b", >> + "toradex,colibri_t30-v11c", >> + "toradex,colibri_t30-v11d", >> + "toradex,colibri_t30", "nvidia,tegra30"; > > Do we really need all those compatible values? If those board revisions > are all SW-compatible, then you may as well write just: You are right. It indeed does not make much sense as only V1.0a which never actually went on sale would be software incompatible. > compatible = "toradex,colibri_t30", "nvidia,tegra30"; > >> + aliases { >> + serial0 = &uarta; >> + serial1 = &uartd; >> + serial2 = &uartb; >> + }; > > tegra20.dtsi already sets the alias names for the serial ports. Previous > discussions settled on giving each on-chip UART a static name, rather > than renaming them per board. Understood, however our Colibri standard defines a completely different order of the UARTs which is what we attempted to indicate by this aliases. >> + pmc@7000e400 { >> + status = "okay"; > > The PMC node isn't disabled in tegra20.dtsi, so you don't need the > status property here.
On Wed, May 14, 2014 at 09:22:54AM +0200, Marcel Ziswiler wrote: > On 05/13/2014 09:49 PM, Stephen Warren wrote: > >On 05/13/2014 11:27 AM, stefan@agner.ch wrote: [...] > >>+ panel: panel { > >>+ compatible = "edt,et057090dhu", "simple-panel"; > > > >The panel-simple driver doesn't seem to know about that EDT panel. How > >will it work out the display timings? > > Good question and me and Stefan actually even talked about that yesterday. I > am actually using KMS right now as follows: > > video=HDMI-A-1:1280x720-16@60 video=LVDS-1:640x480-16@60' > > So the panel node is purely used to hook up the back light part right now. > > From our point of view for our completely generic module approach where each > customer potentially hooks up his own display make/model it would be > desirable to have some way of defining such timings directly through the > device tree. Every customer design would presumably get its own device tree file, so they could easily follow the current conventions and update the panel-simple driver with the proper compatible value and display timings and then simply make the panel device node compatible with that. Thierry
On 05/14/2014 01:22 AM, Marcel Ziswiler wrote: > On 05/13/2014 09:49 PM, Stephen Warren wrote: >> On 05/13/2014 11:27 AM, stefan@agner.ch wrote: >>> This patch adds the device tree to support Toradex Colibri T30, a >>> computer on module which can be used on different carrier boards. >>> >>> The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC, >>> a LM95245 temperature sensor and an AX88772B USB Ethernet >>> Controller. Furthermore, there is a STMPE811 and SGTL5000 audio >>> codec which are not yet supported. Anything that is not self >>> contained on the module is disabled by default. >>> >>> The device tree for the Evaluation Board includes the modules >>> device tree and enables the supported pheripherials of the carrier >>> board (the Evaluation Board supports almost all of them). >> >>> diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts >>> + aliases { >>> + rtc0 = "/i2c@7000c000/rtc@68"; >>> + rtc1 = "/i2c@7000d000/tps65911@2d"; >>> + rtc2 = "/rtc@7000e000"; >>> + }; >> >> Wow, no shortage of RTCs! > > Yes (;-p). Please understand however that there are certain limitation > if it comes to real-time clocks: The first one is the ultra low-power > RTC available on the carrier board. The second one is PMIC integrated > usually drawing much more current that the first dedicated one. The > third one is Tegra SoC internal and won't keep the time across > power-cycles in our design. Sure, I understand this is just representing the HW. It was just surprising to see so many. >>> + /* SPI1: Colibri SSP */ >>> + spi@7000d400 { >>> + status = "okay"; >>> + spi-max-frequency = <25000000>; >>> + can0: can@0 { >>> + compatible = "microchip,mcp2515"; >>> + reg = <0>; >>> + clocks = <&clk16m>; >>> + interrupt-parent = <&gpio>; >>> + interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; >>> + spi-max-frequency = <10000000>; >> >> So this chip doesn't get confused by a faster clock frequency when its >> chip-select line isn't asserted? I would have expected spi-max-frequency >> for the bus to be the minimum value that any device on the bus would >> tolerate. > > No SPI chip should ever get confused like that as long as they are chip > select gated. At least by the traditional chip select meaning as opposed > to NVIDIA's designers taking the term chip select a little too personal: > they indeed only select a chip otherwise all the chip select pins are > just left floating! I'm not convinced about this. The clock signal still reaches all the chips, and hence still reaches some logic inside those chips. If the setup/hold timings aren't met (for internal parts of the chip's SPI state machine), then presumably all bets are off re: performance of the chip, irrespective of whether the CS line happens to gate how much of the chip actually does anything. >> The dr_mode property is only for the PHY node. >> >>> + panel: panel { >>> + compatible = "edt,et057090dhu", "simple-panel"; >> >> The panel-simple driver doesn't seem to know about that EDT panel. How >> will it work out the display timings? > > Good question and me and Stefan actually even talked about that > yesterday. I am actually using KMS right now as follows: > > video=HDMI-A-1:1280x720-16@60 video=LVDS-1:640x480-16@60' > > So the panel node is purely used to hook up the back light part right now. > > From our point of view for our completely generic module approach where > each customer potentially hooks up his own display make/model it would > be desirable to have some way of defining such timings directly through > the device tree. Like Thierry, I think the DT needs to represent the actual HW. If there's no panel on the carrier board itself, then it probably shouldn't even be in the base DT. If a user adds a panel, then they will modify their own DT to correctly represent it. >> compatible = "toradex,colibri_t30", "nvidia,tegra30"; >> >>> + aliases { >>> + serial0 = &uarta; >>> + serial1 = &uartd; >>> + serial2 = &uartb; >>> + }; >> >> tegra20.dtsi already sets the alias names for the serial ports. Previous >> discussions settled on giving each on-chip UART a static name, rather >> than renaming them per board. > > Understood, however our Colibri standard defines a completely different > order of the UARTs which is what we attempted to indicate by this aliases. I'd prefer that all Tegra boards use serial aliases consistently. If there's a real issue with this, please talk to Laxman (CC'd) and see if we can move all the UART alias entries into individual board files, so that this board isn't the odd one out.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 35c146f..9e9669c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -367,6 +367,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ + tegra30-colibri-eval-v3.dtb \ tegra114-dalmore.dtb \ tegra124-venice2.dtb dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts new file mode 100644 index 0000000..f1fb0de --- /dev/null +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -0,0 +1,202 @@ +/dts-v1/; + +#include "tegra30-colibri.dtsi" + +/ { + model = "Toradex Colibri T30 on Colibri Evaluation Board"; + compatible = "toradex,colibri_t30-eval-v3", "nvidia,tegra30"; + + aliases { + rtc0 = "/i2c@7000c000/rtc@68"; + rtc1 = "/i2c@7000d000/tps65911@2d"; + rtc2 = "/rtc@7000e000"; + }; + + host1x@50000000 { + dc@54200000 { + rgb { + status = "okay"; + nvidia,panel = <&panel>; + }; + }; + hdmi@54280000 { + status = "okay"; + }; + }; + + serial@70006000 { + status = "okay"; + }; + + serial@70006040 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + serial@70006300 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + pwm@7000a000 { + status = "okay"; + }; + + /* + * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier + * board) + */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + + /* M41T0M6 real time clock on carrier board */ + rtc@68 { + compatible = "stm,m41t00"; + reg = <0x68>; + }; + }; + + /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */ + hdmiddc: i2c@7000c700 { + status = "okay"; + }; + + /* SPI1: Colibri SSP */ + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + can0: can@0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clk16m>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + spidev0: spi@1 { + compatible = "spidev"; + reg = <1>; + spi-max-frequency = <25000000>; + }; + }; + + sdhci@78000200 { + status = "okay"; + bus-width = <4>; + cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; + no-1-8-v; + }; + + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ + usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + usb-phy@7d000000 { + status = "okay"; + dr_mode = "otg"; + vbus-supply = <&usbc_vbus_reg>; + }; + + /* EHCI instance 2: USB3_DP/N -> USBH_P/N */ + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + vbus-supply = <&usbh_vbus_reg>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + + /* PWM<A> */ + pwms = <&pwm 0 5000000>; + brightness-levels = <255 128 64 32 16 8 4 0>; + default-brightness-level = <6>; + /* BL_ON */ + enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + }; + + clocks { + clk16m: clk@1 { + compatible = "fixed-clock"; + reg=<1>; + #clock-cells = <0>; + clock-frequency = <16000000>; + clock-output-names = "clk16m"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_POWER>; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + panel: panel { + compatible = "edt,et057090dhu", "simple-panel"; + + backlight = <&backlight>; + }; + + pwmleds { + compatible = "pwm-leds"; + + pwmb { + label = "PWM<B>"; + pwms = <&pwm 1 19600>; + max-brightness = <255>; + }; + pwmc { + label = "PWM<C>"; + pwms = <&pwm 2 19600>; + max-brightness = <255>; + }; + pwmd { + label = "PWM<D>"; + pwms = <&pwm 3 19600>; + max-brightness = <255>; + }; + }; + + regulators { + sys_5v0_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + usbc_vbus_reg: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usbc_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&sys_5v0_reg>; + }; + + /* USBH_PEN */ + usbh_vbus_reg: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "usbh_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + vin-supply = <&sys_5v0_reg>; + }; + }; +}; diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi new file mode 100644 index 0000000..a496335 --- /dev/null +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -0,0 +1,375 @@ +#include <dt-bindings/input/input.h> +#include "tegra30.dtsi" + +/* + * Toradex Colibri T30 Device Tree + * Compatible for Revisions 1.1B/1.1C/1.1D + */ +/ { + model = "Toradex Colibri T30"; + compatible = "toradex,colibri_t30-v11b", + "toradex,colibri_t30-v11c", + "toradex,colibri_t30-v11d", + "toradex,colibri_t30", "nvidia,tegra30"; + + aliases { + serial0 = &uarta; + serial1 = &uartd; + serial2 = &uartb; + }; + + memory { + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + hdmi@54280000 { + vdd-supply = <&sys_3v3_reg>; + pll-supply = <&vio_reg>; + + nvidia,hpd-gpio = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmiddc>; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + /* Colibri BL_ON */ + pv2 { + nvidia,pins = "pv2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri Backlight PWM<A> */ + sdmmc3_dat3_pb4 { + nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,function = "pwm0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri CAN_INT */ + kb_row8_ps0 { + nvidia,pins = "kb_row8_ps0"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* Thermal alert, need to be tristated */ + lcd_dc1_pd2 { + nvidia,pins = "lcd_dc1_pd2"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* Colibri MMC */ + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "sdmmc2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7"; + nvidia,function = "sdmmc2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri SSP */ + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_dat6_pd3 { + nvidia,pins = "sdmmc3_dat6_pd3", + "sdmmc3_dat7_pd4"; + nvidia,function = "spdif"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + + /* Colibri UART_A */ + ulpi_data0 { + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri UART_B */ + gmi_a16_pj7 { + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri UART_C */ + uart2_rxd { + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* eMMC */ + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + hdmiddc: i2c@7000c700 { + clock-frequency = <100000>; + }; + + /* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + vcc1-supply = <&sys_3v3_reg>; + vcc2-supply = <&sys_3v3_reg>; + vcc3-supply = <&vio_reg>; + vcc4-supply = <&sys_3v3_reg>; + vcc5-supply = <&sys_3v3_reg>; + vcc6-supply = <&vio_reg>; + vcc7-supply = <&sys_5v0_reg>; + vccio-supply = <&sys_3v3_reg>; + + regulators { + /* SW1: +V1.35_VDDIO_DDR */ + vdd1_reg: vdd1 { + regulator-name = "vddio_ddr_1v35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + /* SW2: unused */ + + /* SW CTRL: +V1.2_VDD_CPU */ + vddctrl_reg: vddctrl { + regulator-name = "vdd_cpu,vdd_sys"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* SWIO: +V1.8 */ + vio_reg: vio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + /* LDO1: unused */ + + /* + * EN_+V3.3 switching via FET: + * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN + * see also v3_3 fixed supply + */ + ldo2_reg: ldo2 { + regulator-name = "en_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* LDO3: unused */ + + /* +V1.2_VDD_RTC */ + ldo4_reg: ldo4 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* + * +V2.8_AVDD_VDAC: + * only required for analog RGB + */ + ldo5_reg: ldo5 { + regulator-name = "avdd_vdac"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + /* + * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V + * but LDO6 can't set voltage in 50mV + * granularity + */ + ldo6_reg: ldo6 { + regulator-name = "avdd_plle"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + /* +V1.2_AVDD_PLL */ + ldo7_reg: ldo7 { + regulator-name = "avdd_pll"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* +V1.0_VDD_DDR_HS */ + ldo8_reg: ldo8 { + regulator-name = "vdd_ddr_hs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + }; + }; + + /* + * LM95245 temperature sensor + * Note: OVERT_N directly connected to PMIC PWRDN + */ + temp-sensor@4c { + compatible = "national,lm95245"; + reg = <0x4c>; + }; + + /* SW: +V1.2_VDD_CORE */ + tps62362@60 { + compatible = "ti,tps62362"; + reg = <0x60>; + + regulator-name = "tps62362-vout"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-low; + /* VSEL1: EN_CORE_DVFS_N low for DVFS */ + ti,vsel1-state-low; + }; + }; + + pmc@7000e400 { + status = "okay"; + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + }; + + emmc: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + /* EHCI instance 1: USB2_DP/N -> AX88772B */ + usb@7d004000 { + status = "okay"; + }; + + usb-phy@7d004000 { + status = "okay"; + nvidia,is-wired = <1>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clk@0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sys_3v3_reg: regulator@100 { + compatible = "regulator-fixed"; + reg = <100>; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +};