| Message ID | 1397654063-8055-1-git-send-email-archit@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi On Wed, 16 Apr 2014, Archit Taneja wrote: > The control module isn't actually a clock management module, but there are a few > register bits which perform gating and muxing of clocks. > > Add CTRL_MODULE_CORE sub block as a clock provider for DRA7. The control module > has 2 sub modules: CTRL_MODULE_CORE, and CTRL_MODULE_WKUP. Out of these, only > the CORE sub module has clock related register fields. We ignore the WKUP sub > module. > > Signed-off-by: Archit Taneja <archit@ti.com> > --- > arch/arm/mach-omap2/prm_common.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c > index b4c4ab9..f86029a 100644 > --- a/arch/arm/mach-omap2/prm_common.c > +++ b/arch/arm/mach-omap2/prm_common.c > @@ -489,6 +489,7 @@ static struct of_device_id omap_prcm_dt_match_table[] = { > { .compatible = "ti,dra7-prm" }, > { .compatible = "ti,dra7-cm-core-aon" }, > { .compatible = "ti,dra7-cm-core" }, > + { .compatible = "ti,dra7-ctrl-core" }, > { } > }; So, based on a quick glance, and without the benefit of any documentation, it makes general sense to add the DRA7 CTRL module as a clock provider, but it does not make any sense to associate it with the PRCM. Please find a control module-specific piece of code to register as a clock provider, not prm_common.c. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
This series tries to create CONTROL_MODULE_CORE as a new clock provider, and create a clock using it required by DSS on DRA7. The previous revision of the series added the new clock provider within prcm driver code itself. Suggestions were made by Paul and Tero to move it to control module driver code. I picked up 2 patches from Tero's WIP branch below, and added DRA7's control module core block as a clock provider. The DSS_DESHDCP clock is easy to implement after that. https://github.com/t-kristo/linux-pm/tree/3.14-rc4-cm-prm-driver-wip Archit Taneja (5): ARM: PRCM: split PRCM module init to their own driver files ARM: OMAP2+: Add CONTROL_MODULE_CORE as a clock provider for DRA7x ARM: dts: Add ctrl-core DT node for DRA7 ARM: dts: Add dss_deshdcp clock node under dra7-ctrl-core CLK: TI: Enable dss_deshdcp clock in dra7xx_clk_init Tero Kristo (1): CLK: TI: clockdomain: add support for retrying init arch/arm/boot/dts/dra7.dtsi | 13 ++++++ arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 +++++ arch/arm/mach-omap2/cm_common.c | 18 +++++++++ arch/arm/mach-omap2/control.c | 35 ++++++++++++++++ arch/arm/mach-omap2/control.h | 1 + arch/arm/mach-omap2/io.c | 4 ++ arch/arm/mach-omap2/prcm-common.h | 5 +++ arch/arm/mach-omap2/prm_common.c | 55 +++++++++++++++----------- drivers/clk/ti/clk-7xx.c | 8 +++- drivers/clk/ti/clockdomain.c | 77 ++++++++++++++++++++++++++++++------ include/linux/clk/ti.h | 2 +- 11 files changed, 192 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index b4c4ab9..f86029a 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -489,6 +489,7 @@ static struct of_device_id omap_prcm_dt_match_table[] = { { .compatible = "ti,dra7-prm" }, { .compatible = "ti,dra7-cm-core-aon" }, { .compatible = "ti,dra7-cm-core" }, + { .compatible = "ti,dra7-ctrl-core" }, { } };
The control module isn't actually a clock management module, but there are a few register bits which perform gating and muxing of clocks. Add CTRL_MODULE_CORE sub block as a clock provider for DRA7. The control module has 2 sub modules: CTRL_MODULE_CORE, and CTRL_MODULE_WKUP. Out of these, only the CORE sub module has clock related register fields. We ignore the WKUP sub module. Signed-off-by: Archit Taneja <archit@ti.com> --- arch/arm/mach-omap2/prm_common.c | 1 + 1 file changed, 1 insertion(+)