diff mbox

spi/pxa2xx: change default supported DMA burst size to 1

Message ID 1401990309-12492-1-git-send-email-chiau.ee.chew@intel.com (mailing list archive)
State Accepted
Commit 01d7aafb3fbaafe2403780ef9ed497b3289ab1b9
Headers show

Commit Message

Chew Chiau Ee June 5, 2014, 5:45 p.m. UTC 
From: Chew, Chiau Ee <chiau.ee.chew@intel.com>

This is to fix the SPI DMA transfer failure for speed less than 1M.
If using current DMA burst size setting (16), the Rx data bytes are
invalid due to each data byte is multiplied according to the burst
size setting.

Let's said supposedly we shall receive the following 18 bytes of data:
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18
Instead, the data bytes received consist of "16 bytes of '01' +
2 bytes of '02'" :
01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 02 02

Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/spi/spi-pxa2xx-dma.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Mika Westerberg June 5, 2014, 9:46 a.m. UTC | #1 
On Fri, Jun 06, 2014 at 01:45:09AM +0800, Chew Chiau Ee wrote:
> From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> 
> This is to fix the SPI DMA transfer failure for speed less than 1M.
> If using current DMA burst size setting (16), the Rx data bytes are
> invalid due to each data byte is multiplied according to the burst
> size setting.
> 
> Let's said supposedly we shall receive the following 18 bytes of data:
> 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18
> Instead, the data bytes received consist of "16 bytes of '01' +
> 2 bytes of '02'" :
> 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 02 02
> 
> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> Cc: Mika Westerberg <mika.westerberg@linux.intel.com>

Works for me (and individual chips can tune this by passing custom
dma_burst_size if needed).

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Mark Brown June 6, 2014, 9:52 a.m. UTC | #2 
On Fri, Jun 06, 2014 at 01:45:09AM +0800, Chew Chiau Ee wrote:
> From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> 
> This is to fix the SPI DMA transfer failure for speed less than 1M.
> If using current DMA burst size setting (16), the Rx data bytes are
> invalid due to each data byte is multiplied according to the burst
> size setting.

Applied, thanks.
diff mbox

Patch

diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c
index f6759dc..c41ff14 100644
--- a/drivers/spi/spi-pxa2xx-dma.c
+++ b/drivers/spi/spi-pxa2xx-dma.c
@@ -368,7 +368,7 @@  int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
 	 * otherwise we use the default. Also we use the default FIFO
 	 * thresholds for now.
 	 */
-	*burst_code = chip_info ? chip_info->dma_burst_size : 16;
+	*burst_code = chip_info ? chip_info->dma_burst_size : 1;
 	*threshold = SSCR1_RxTresh(RX_THRESH_DFLT)
 		   | SSCR1_TxTresh(TX_THRESH_DFLT);