imx-drm: imx-hdmi: fix hdmi hotplug detection initial state

On Tue, Jun 10, 2014 at 09:58:54AM -0300, Fabio Estevam wrote:
> Booting the kernel with the HDMI cable connected (no image is seen on
> HDMI, only on LVDS):

Reformatting a bit:

> disp 0: panel size = 1920 x 1080
> Clocks: IPU 264000000Hz DI 24000000Hz Needed 138500000Hz
>   IPU clock can give 132000000 with divider 2, error -4.3%
> Want 138500000Hz IPU 264000000Hz DI 138500000Hz using DI, 138500000Hz
> disp 1: panel size = 1024 x 768
> Clocks: IPU 264000000Hz DI 64999999Hz Needed 65000000Hz
> Want 65000000Hz IPU 264000000Hz DI 64999999Hz using DI, 64999999Hz
> 
> After cable removal:
> disp 0: panel size = 1024 x 768
> Clocks: IPU 264000000Hz DI 64999999Hz Needed 65000000Hz
> Want 65000000Hz IPU 264000000Hz DI 64999999Hz using DI, 64999999Hz

So here we can see that the clock for DI0 got changed beneath it from
138.5MHz to 65MHz, probably when the DI1 clock was changed.

> After cable re-insertion (image is seen on both HDMI and LVDS):
> disp 0: panel size = 1920 x 1080
> Clocks: IPU 264000000Hz DI 64999999Hz Needed 138500000Hz
>   IPU clock can give 132000000 with divider 2, error -4.3%
> Want 138500000Hz IPU 264000000Hz DI 129999997Hz using DI, 129999997Hz
> disp 1: panel size = 1024 x 768
> Clocks: IPU 264000000Hz DI 64999999Hz Needed 65000000Hz
> Want 65000000Hz IPU 264000000Hz DI 64999999Hz using DI, 64999999Hz

The strange thing here is that DI0, when asking for 138.5MHz, only gets
130MHz (a multiple of DI1's frequency) yet when DI1 reduced it to 65MHz,
the CCF just obliged.

Let's go back to the basic requirements for LDB, because I think there's
a bug here.

1. the LDB serial clock must be 7x the LDB DI clock.
2. for single/split/separate mode, the IPU DI clock must be the same
   and synchronous with the LDB DI clock.
3. for dual mode, the IPU DI clock must be twice the LDB DI clock, and
   must be synchronised with the LDB DI clock.

(1) is provided for us via the CCM clock tree - there is already a /7
divider between the LDB serial clock and the LDB DI clock:

LM --+-------- LDB serial
      `- /7 -- LDB DI clock

where LM is the LDB clock muxer.

I'm going to leave case (3) for the time being, because at the moment, I
can't see how to achieve it given the clock tree structure that the iMX6
CPUs offer - I'm going to make the assumption at the present time that
this mode is not supported.

The easiest way to achieve (2) is to set the IPU DI clock mux to select
the LDB DI clock directly:

LM --+---------------- LDB serial
      `- /7 -+-------- LDB DI clock
              `- IM -- IPU DI clock

where 'M' is the IPU DI clock muxer.  However, we're currently setting
this up as:

LM --+---------------- LDB serial
      `- /7 -+-------- LDB DI clock
IPM --- /N ---- IM --- IPU DI clock

and hoping that the LDB and IPU DI clocks are appropriately synchronised.
This is the bug I refer to above.

Finally, for HDMI, we need:

PLL5 -- IPM -- IM -- IPU DI clock

What this implies is that we need control of the IPU DI clock muxer (IM)
and each DI needs to know what kind of display bridge(s) are connected
to it, so that the appropriate parent(s) can be selected.

We can get a little closer to that (and clean up the code) with the patch
below.  It gives us some of the information we have really been wanting to
know all along in ipu_crtc_mode_set(), that is which kinds of bridges are
connected to the DI.

What we /really/ need to solve the above problem is exactly which bridges
are connected as well - whether it's LDB0 or LDB1, and also how to get at
the clocks to be able to control that mux.  I'm at a loss how best to do
that given the complexity of iMX6 DT, and I don't think we want to add
these to the IPU/DI node as the IPU/DI isn't really connected to these
clocks - it's connected to the IM mux which is internal to the CCM.

I think this patch also should help Denis Carikli, as the polarity of
the clock signal (etc) also depends on the type(s) of encoders attached
to the DI.  We really should fail if we end up with encoders with
incompatible requirements trying to be bound to a single DI.

(side note: I'd really like to get rid of imx_drm_panel_format*()...)

In any case, to fix this I think we're looking at changing the DT stuff
again, and as the IPU code is moving out of drivers/staging, this is going
to become increasing difficult... 

 drivers/staging/imx-drm/imx-drm-core.c |  3 +--
 drivers/staging/imx-drm/imx-drm.h      |  2 +-
 drivers/staging/imx-drm/ipuv3-crtc.c   | 40 +++++++++++++++++++---------------
 3 files changed, 25 insertions(+), 20 deletions(-)

imx-drm: imx-hdmi: fix hdmi hotplug detection initial state

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