diff mbox

[Re-send,1/1] arm: dra7xx: Add hwmod data for MDIO and CPSW

Message ID 1404825399-10330-1-git-send-email-mugunthanvnm@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Mugunthan V N July 8, 2014, 1:16 p.m. UTC
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---

This patch was already send twice on 2013-10-18 and 2014-05-13. Adding
more people in Cc to review the patch.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 65 +++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

Comments

Sebastian Andrzej Siewior July 9, 2014, 9:55 a.m. UTC | #1
On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
> Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC

I reverted my patch, applied this one and after boot I got:

|platform 48485000.mdio: Cannot lookup hwmod 'davinci_mdio'
|cpsw 48484000.ethernet: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
|davinci_mdio 48485000.mdio: failed to get device clock
|davinci_mdio: probe of 48485000.mdio failed with error -2
|cpsw 48484000.ethernet: Random MACID = 46:c6:34:6f:8d:c6
| (null): fck is not found

with no eth0. Is there something with my setup? I still have the device
tree pieces I posted (in case there is something wrong with them).

Sebastian
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Sebastian Andrzej Siewior July 9, 2014, 10:01 a.m. UTC | #2
On 2014-07-09 11:55:52 [+0200], Sebastian Andrzej Siewior wrote:
> On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
> > Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
> 
> I reverted my patch, applied this one and after boot I got:
Oh me dum dum. I had --dry-run…

Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>

This is basically what Tony hasked me to do: No IRQ numbers & iomem.

Sebastian
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Tony Lindgren July 9, 2014, 10:11 a.m. UTC | #3
* Sebastian Andrzej Siewior <sebastian@breakpoint.cc> [140709 03:03]:
> On 2014-07-09 11:55:52 [+0200], Sebastian Andrzej Siewior wrote:
> > On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
> > > Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
> > 
> > I reverted my patch, applied this one and after boot I got:
> Oh me dum dum. I had --dry-run…
> 
> Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> 
> This is basically what Tony hasked me to do: No IRQ numbers & iomem.

OK great thanks for testing :)

Tony
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Paul Walmsley July 15, 2014, 8:21 p.m. UTC | #4
Hi Sebastian,

On Wed, 9 Jul 2014, Sebastian Andrzej Siewior wrote:

> On 2014-07-09 11:55:52 [+0200], Sebastian Andrzej Siewior wrote:
> > On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
> > > Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
> > 
> > I reverted my patch, applied this one and after boot I got:
> Oh me dum dum. I had --dry-run…
> 
> Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> 
> This is basically what Tony hasked me to do: No IRQ numbers & iomem.

Sorry - I'm a bit confused - Sebastian, did you test this one?  If so, is 
it okay to add a Tested-by from you?

Mugunthan, could you please get a Reviewed-by: from one of the folks on 
the DRA7xx SoC integration reviewers list that I sent earlier?


- Paul
Sebastian Andrzej Siewior July 16, 2014, 7:06 a.m. UTC | #5
On 2014-07-15 20:21:21 [+0000], Paul Walmsley wrote:
> Hi Sebastian,
Hi Paul,

> > Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > 
> > This is basically what Tony hasked me to do: No IRQ numbers & iomem.
> 
> Sorry - I'm a bit confused - Sebastian, did you test this one?  If so, is 
> it okay to add a Tested-by from you?

Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>

> - Paul

Sebastian
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Paul Walmsley July 16, 2014, 6:57 p.m. UTC | #6
On Wed, 16 Jul 2014, Sebastian Andrzej Siewior wrote:

> On 2014-07-15 20:21:21 [+0000], Paul Walmsley wrote:
> 
> > > Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > > 
> > > This is basically what Tony hasked me to do: No IRQ numbers & iomem.
> > 
> > Sorry - I'm a bit confused - Sebastian, did you test this one?  If so, is 
> > it okay to add a Tested-by from you?
> 
> Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>

Thanks Sebastian.

Mugunthan, next step would be for you to get a Reviewed-by: by someone who 
has access to the (non-public) DRA7xx TRM, and can review for SoC 
integration.  Since Rajendra is no longer at TI, the right person is 
probably Tony.

Then this patch should be mergeable.


- Paul
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Tony Lindgren July 17, 2014, 7:49 a.m. UTC | #7
* Mugunthan V N <mugunthanvnm@ti.com> [140708 06:18]:
> Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
> 
> Cc: Rajendra Nayak <rnayak@ti.com>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Paul Walmsley <paul@pwsan.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
> 
> This patch was already send twice on 2013-10-18 and 2014-05-13. Adding
> more people in Cc to review the patch.
> 
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 65 +++++++++++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 20b4398..45b5113 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -273,6 +273,56 @@ static struct omap_hwmod dra7xx_ctrl_module_wkup_hwmod = {
>  };
>  
>  /*
> + * 'gmac' class
> + * cpsw/gmac sub system
> + */
> +static struct omap_hwmod_class_sysconfig dra7xx_gmac_sysc = {
> +	.rev_offs	= 0x0,
> +	.sysc_offs	= 0x8,
> +	.syss_offs	= 0x4,
> +	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
> +			   SYSS_HAS_RESET_STATUS),
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE |
> +			   MSTANDBY_NO),
> +	.sysc_fields	= &omap_hwmod_sysc_type3,
> +};

We seem to have this layout WR_SOFT_RESET and WR_CONTROL in the TRM:

WR_SOFT_RESET
[0]     SOFT_RESET

WR_CONTROL
[3:2]   MMR_STDBYMODE   0 = force-idle, 1 = no-standby
[1:0]   MMR_IDLEMODE    0 = force-idle, 1 = no-idle

And so it seems to match what am33xx also has for am33xx_cpgmac_sysc
and am33xx TRM for 14.5.9 CONTROL register. So as far as I'm concerned:

Acked-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren July 17, 2014, 7:50 a.m. UTC | #8
* Paul Walmsley <paul@pwsan.com> [140716 11:59]:
> On Wed, 16 Jul 2014, Sebastian Andrzej Siewior wrote:
> 
> > On 2014-07-15 20:21:21 [+0000], Paul Walmsley wrote:
> > 
> > > > Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > > > 
> > > > This is basically what Tony hasked me to do: No IRQ numbers & iomem.
> > > 
> > > Sorry - I'm a bit confused - Sebastian, did you test this one?  If so, is 
> > > it okay to add a Tested-by from you?
> > 
> > Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> 
> Thanks Sebastian.
> 
> Mugunthan, next step would be for you to get a Reviewed-by: by someone who 
> has access to the (non-public) DRA7xx TRM, and can review for SoC 
> integration.  Since Rajendra is no longer at TI, the right person is 
> probably Tony.
> 
> Then this patch should be mergeable.

Yeah took a look at it and acked it.

Tony
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Mugunthan V N July 22, 2014, 10:11 a.m. UTC | #9
On Thursday 17 July 2014 01:19 PM, Tony Lindgren wrote:
> We seem to have this layout WR_SOFT_RESET and WR_CONTROL in the TRM:
>
> WR_SOFT_RESET
> [0]     SOFT_RESET
>
> WR_CONTROL
> [3:2]   MMR_STDBYMODE   0 = force-idle, 1 = no-standby
> [1:0]   MMR_IDLEMODE    0 = force-idle, 1 = no-idle
>
> And so it seems to match what am33xx also has for am33xx_cpgmac_sysc
> and am33xx TRM for 14.5.9 CONTROL register. So as far as I'm concerned:
>
> Acked-by: Tony Lindgren <tony@atomide.com>
Paul,

Can you pull this patch as Tony acked the patch.

Regards
Mugunthan V N
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Paul Walmsley July 22, 2014, 6:53 p.m. UTC | #10
On Thu, 17 Jul 2014, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [140716 11:59]:
> > On Wed, 16 Jul 2014, Sebastian Andrzej Siewior wrote:
> > 
> > > On 2014-07-15 20:21:21 [+0000], Paul Walmsley wrote:
> > > 
> > > > > Acked-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > > > > 
> > > > > This is basically what Tony hasked me to do: No IRQ numbers & iomem.
> > > > 
> > > > Sorry - I'm a bit confused - Sebastian, did you test this one?  If so, is 
> > > > it okay to add a Tested-by from you?
> > > 
> > > Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> > 
> > Thanks Sebastian.
> > 
> > Mugunthan, next step would be for you to get a Reviewed-by: by someone who 
> > has access to the (non-public) DRA7xx TRM, and can review for SoC 
> > integration.  Since Rajendra is no longer at TI, the right person is 
> > probably Tony.
> > 
> > Then this patch should be mergeable.
> 
> Yeah took a look at it and acked it.

Thanks queued for 3.17.


- Paul
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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..45b5113 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -273,6 +273,56 @@  static struct omap_hwmod dra7xx_ctrl_module_wkup_hwmod = {
 };
 
 /*
+ * 'gmac' class
+ * cpsw/gmac sub system
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_gmac_sysc = {
+	.rev_offs	= 0x0,
+	.sysc_offs	= 0x8,
+	.syss_offs	= 0x4,
+	.sysc_flags	= (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
+			   SYSS_HAS_RESET_STATUS),
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE |
+			   MSTANDBY_NO),
+	.sysc_fields	= &omap_hwmod_sysc_type3,
+};
+
+static struct omap_hwmod_class dra7xx_gmac_hwmod_class = {
+	.name		= "gmac",
+	.sysc		= &dra7xx_gmac_sysc,
+};
+
+static struct omap_hwmod dra7xx_gmac_hwmod = {
+	.name		= "gmac",
+	.class		= &dra7xx_gmac_hwmod_class,
+	.clkdm_name	= "gmac_clkdm",
+	.flags		= (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
+	.main_clk	= "dpll_gmac_ck",
+	.mpu_rt_idx	= 1,
+	.prcm		= {
+		.omap4	= {
+			.clkctrl_offs	= DRA7XX_CM_GMAC_GMAC_CLKCTRL_OFFSET,
+			.context_offs	= DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET,
+			.modulemode	= MODULEMODE_SWCTRL,
+		},
+	},
+};
+
+/*
+ * 'mdio' class
+ */
+static struct omap_hwmod_class dra7xx_mdio_hwmod_class = {
+	.name		= "davinci_mdio",
+};
+
+static struct omap_hwmod dra7xx_mdio_hwmod = {
+	.name		= "davinci_mdio",
+	.class		= &dra7xx_mdio_hwmod_class,
+	.clkdm_name	= "gmac_clkdm",
+	.main_clk	= "dpll_gmac_ck",
+};
+
+/*
  * 'dcan' class
  *
  */
@@ -1999,6 +2049,19 @@  static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__cpgmac0 = {
+	.master		= &dra7xx_l4_per2_hwmod,
+	.slave		= &dra7xx_gmac_hwmod,
+	.clk		= "dpll_gmac_ck",
+	.user		= OCP_USER_MPU,
+};
+
+static struct omap_hwmod_ocp_if dra7xx_gmac__mdio = {
+	.master		= &dra7xx_gmac_hwmod,
+	.slave		= &dra7xx_mdio_hwmod,
+	.user		= OCP_USER_MPU,
+};
+
 /* l4_wkup -> dcan1 */
 static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = {
 	.master		= &dra7xx_l4_wkup_hwmod,
@@ -2642,6 +2705,8 @@  static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_wkup__ctrl_module_wkup,
 	&dra7xx_l4_wkup__dcan1,
 	&dra7xx_l4_per2__dcan2,
+	&dra7xx_l4_per2__cpgmac0,
+	&dra7xx_gmac__mdio,
 	&dra7xx_l4_cfg__dma_system,
 	&dra7xx_l3_main_1__dss,
 	&dra7xx_l3_main_1__dispc,