diff mbox

[v4,0/6] Add Keystone PCIe controller driver

Message ID 20140714060334.GB2930@pratyush-vbox (mailing list archive)
State New, archived
Headers show

Commit Message

Pratyush ANAND July 14, 2014, 6:03 a.m. UTC 
Oh.. I see my reply from gmail is not readable at all. (I forgot to
switch to plain text :( ) Please ignore last mail I am replying again
here.

On Sat, Jul 12, 2014 at 04:36:29AM +0800, Murali Karicheri wrote:

[...]

> Murali Karicheri (6):
>   PCI: designware: add rd[wr]_other_conf API
>   PCI: designware: refactor MSI code to work with v3.65 dw hardware

For  above two you can add my reviewed-by:

>   PCI: designware: refactor host init code to re-use on keystone PCI
>   PCI: designware: enhance dw core driver to support keystone PCI host

In stead of using version number and then changing few functions from
static to global , I would have used same philosophy of adding callbacks
wherever needed. May be maintainers can give their view, instead of patch 
3 and 4 I would have gone with something like this, where kc_pcie can be 
passed through pp->plat_data.
 


~Pratyush

Comments

Jingoo Han July 14, 2014, 12:23 p.m. UTC | #1 
On Monday, July 14, 2014 3:04 PM, Pratyush Anand wrote:
> On Sat, Jul 12, 2014 at 04:36:29AM +0800, Murali Karicheri wrote:
> 
> [...]
> 
> > Murali Karicheri (6):
> >   PCI: designware: add rd[wr]_other_conf API
> >   PCI: designware: refactor MSI code to work with v3.65 dw hardware
> 
> For  above two you can add my reviewed-by:
> 
> >   PCI: designware: refactor host init code to re-use on keystone PCI
> >   PCI: designware: enhance dw core driver to support keystone PCI host
> 
> In stead of using version number and then changing few functions from
> static to global , I would have used same philosophy of adding callbacks
> wherever needed. May be maintainers can give their view, instead of patch
> 3 and 4 I would have gone with something like this, where kc_pcie can be
> passed through pp->plat_data.

I agree with your suggestion. I don't want to use the version number.
The call back would be better.

Best regards,
Jingoo Han

> 
> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index 905941c..b216192 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -490,16 +490,21 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>         }
> 
>         if (IS_ENABLED(CONFIG_PCI_MSI)) {
> -               pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
> -                                       MAX_MSI_IRQS, &msi_domain_ops,
> -                                       &dw_pcie_msi_chip);
> -               if (!pp->irq_domain) {
> -                       dev_err(pp->dev, "irq domain init failed\n");
> -                       return -ENXIO;
> -               }
> +               if (!pp->ops->msi_init) {
> +                       pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
> +                                               MAX_MSI_IRQS, &msi_domain_ops,
> +                                               &dw_pcie_msi_chip);
> +                       if (!pp->irq_domain) {
> +                               dev_err(pp->dev, "irq domain init failed\n");
> +                               return -ENXIO;
> +                       }
> 
> -               for (i = 0; i < MAX_MSI_IRQS; i++)
> -                       irq_create_mapping(pp->irq_domain, i);
> +                       for (i = 0; i < MAX_MSI_IRQS; i++)
> +                               irq_create_mapping(pp->irq_domain, i);
> +               } else {
> +                       pp->ops->msi_init(pp, &msi_domain_ops,
> +                                               &dw_pcie_msi_chip);
> +               }
>         }
> 
>         if (pp->ops->host_init)
> @@ -759,6 +764,9 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
>                 BUG();
>         }
> 
> +       if (bus && pp->ops->scan_bus)
> +               bus = pp->ops->scan_bus(pp);
> +
>         return bus;
>  }
> 
> diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
> index 387f69e..39ce496 100644
> --- a/drivers/pci/host/pcie-designware.h
> +++ b/drivers/pci/host/pcie-designware.h
> @@ -52,6 +52,7 @@ struct pcie_port {
>         struct irq_domain       *irq_domain;
>         unsigned long           msi_data;
>         DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> +       void                    *plat_data;
>  };
> 
>  struct pcie_host_ops {
> @@ -70,6 +71,9 @@ struct pcie_host_ops {
>         void (*msi_set_irq)(struct pcie_port *pp, int irq);
>         void (*msi_clear_irq)(struct pcie_port *pp, int irq);
>         u32 (*get_msi_data)(struct pcie_port *pp);
> +       struct pci_bus *(*scan_bus)(struct pcie_port *pp);
> +       void (*msi_init) (struct pcie_port *pp, struct irq_domain_ops *ops,
> +                       struct msi_chip *chip);
>  };
> 
>  int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);
> 
> 
> ~Pratyush
Murali Karicheri July 14, 2014, 2:28 p.m. UTC | #2 
On 07/14/2014 02:03 AM, Pratyush Anand wrote:
> Oh.. I see my reply from gmail is not readable at all. (I forgot to
> switch to plain text :( ) Please ignore last mail I am replying again
> here.
>
> On Sat, Jul 12, 2014 at 04:36:29AM +0800, Murali Karicheri wrote:
>
> [...]
>
>> Murali Karicheri (6):
>>    PCI: designware: add rd[wr]_other_conf API
>>    PCI: designware: refactor MSI code to work with v3.65 dw hardware
>
> For  above two you can add my reviewed-by:
>
>>    PCI: designware: refactor host init code to re-use on keystone PCI
>>    PCI: designware: enhance dw core driver to support keystone PCI host
>
> In stead of using version number and then changing few functions from
> static to global , I would have used same philosophy of adding callbacks
> wherever needed. May be maintainers can give their view, instead of patch
> 3 and 4 I would have gone with something like this, where kc_pcie can be
> passed through pp->plat_data.
>

Pratyush,

Thanks for the response. I will look into your proposal and respond back 
when I get a chance.

Thanks and regards,

Murali

> diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
> index 905941c..b216192 100644
> --- a/drivers/pci/host/pcie-designware.c
> +++ b/drivers/pci/host/pcie-designware.c
> @@ -490,16 +490,21 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
>          }
>
>          if (IS_ENABLED(CONFIG_PCI_MSI)) {
> -               pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
> -                                       MAX_MSI_IRQS,&msi_domain_ops,
> -&dw_pcie_msi_chip);
> -               if (!pp->irq_domain) {
> -                       dev_err(pp->dev, "irq domain init failed\n");
> -                       return -ENXIO;
> -               }
> +               if (!pp->ops->msi_init) {
> +                       pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
> +                                               MAX_MSI_IRQS,&msi_domain_ops,
> +&dw_pcie_msi_chip);
> +                       if (!pp->irq_domain) {
> +                               dev_err(pp->dev, "irq domain init failed\n");
> +                               return -ENXIO;
> +                       }
>
> -               for (i = 0; i<  MAX_MSI_IRQS; i++)
> -                       irq_create_mapping(pp->irq_domain, i);
> +                       for (i = 0; i<  MAX_MSI_IRQS; i++)
> +                               irq_create_mapping(pp->irq_domain, i);
> +               } else {
> +                       pp->ops->msi_init(pp,&msi_domain_ops,
> +&dw_pcie_msi_chip);
> +               }
>          }
>
>          if (pp->ops->host_init)
> @@ -759,6 +764,9 @@ static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
>                  BUG();
>          }
>
> +       if (bus&&  pp->ops->scan_bus)
> +               bus = pp->ops->scan_bus(pp);
> +
>          return bus;
>   }
>
> diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
> index 387f69e..39ce496 100644
> --- a/drivers/pci/host/pcie-designware.h
> +++ b/drivers/pci/host/pcie-designware.h
> @@ -52,6 +52,7 @@ struct pcie_port {
>          struct irq_domain       *irq_domain;
>          unsigned long           msi_data;
>          DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> +       void                    *plat_data;
>   };
>
>   struct pcie_host_ops {
> @@ -70,6 +71,9 @@ struct pcie_host_ops {
>          void (*msi_set_irq)(struct pcie_port *pp, int irq);
>          void (*msi_clear_irq)(struct pcie_port *pp, int irq);
>          u32 (*get_msi_data)(struct pcie_port *pp);
> +       struct pci_bus *(*scan_bus)(struct pcie_port *pp);
> +       void (*msi_init) (struct pcie_port *pp, struct irq_domain_ops *ops,
> +                       struct msi_chip *chip);
>   };
>
>   int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);
>
>
> ~Pratyush
diff mbox

Patch

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 905941c..b216192 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -490,16 +490,21 @@  int __init dw_pcie_host_init(struct pcie_port *pp)
        }
 
        if (IS_ENABLED(CONFIG_PCI_MSI)) {
-               pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
-                                       MAX_MSI_IRQS, &msi_domain_ops,
-                                       &dw_pcie_msi_chip);
-               if (!pp->irq_domain) {
-                       dev_err(pp->dev, "irq domain init failed\n");
-                       return -ENXIO;
-               }
+               if (!pp->ops->msi_init) {
+                       pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
+                                               MAX_MSI_IRQS, &msi_domain_ops,
+                                               &dw_pcie_msi_chip);
+                       if (!pp->irq_domain) {
+                               dev_err(pp->dev, "irq domain init failed\n");
+                               return -ENXIO;
+                       }
 
-               for (i = 0; i < MAX_MSI_IRQS; i++)
-                       irq_create_mapping(pp->irq_domain, i);
+                       for (i = 0; i < MAX_MSI_IRQS; i++)
+                               irq_create_mapping(pp->irq_domain, i);
+               } else {
+                       pp->ops->msi_init(pp, &msi_domain_ops,
+                                               &dw_pcie_msi_chip);
+               }
        }
 
        if (pp->ops->host_init)
@@ -759,6 +764,9 @@  static struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys)
                BUG();
        }
 
+       if (bus && pp->ops->scan_bus)
+               bus = pp->ops->scan_bus(pp);
+
        return bus;
 }
 
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index 387f69e..39ce496 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -52,6 +52,7 @@  struct pcie_port {
        struct irq_domain       *irq_domain;
        unsigned long           msi_data;
        DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
+       void                    *plat_data;
 };
 
 struct pcie_host_ops {
@@ -70,6 +71,9 @@  struct pcie_host_ops {
        void (*msi_set_irq)(struct pcie_port *pp, int irq);
        void (*msi_clear_irq)(struct pcie_port *pp, int irq);
        u32 (*get_msi_data)(struct pcie_port *pp);
+       struct pci_bus *(*scan_bus)(struct pcie_port *pp);
+       void (*msi_init) (struct pcie_port *pp, struct irq_domain_ops *ops,
+                       struct msi_chip *chip);
 };
 
 int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);