| Message ID | 1863399.9O2S91ZvEO@amdc1032 (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jul 18, 2014 at 05:00:02PM +0100, Bartlomiej Zolnierkiewicz wrote: > Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation > when topology is read from DT") fixed GIC driver to filter cluster ID > from values returned by cpu_logical_map() for SoCs having registers > mapped without per-CPU banking making it is possible to add CPU nodes > for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also > required by future changes adding initialization of cpuidle states in > Exynos cpuidle driver through DT. > > Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC). > > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > --- > Based on next-20140717 branch of linux-next tree + > - [PATCH 2/6] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code > http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg32811.html > - [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT > http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34277.html > > arch/arm/boot/dts/exynos4210.dtsi | 17 +++++++++++++++++ > arch/arm/boot/dts/exynos4212.dtsi | 17 +++++++++++++++++ > arch/arm/boot/dts/exynos4412.dtsi | 29 +++++++++++++++++++++++++++++ > 3 files changed, 63 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi > index ee3001f..b99fc83 100644 > --- a/arch/arm/boot/dts/exynos4210.dtsi > +++ b/arch/arm/boot/dts/exynos4210.dtsi > @@ -31,6 +31,23 @@ > pinctrl2 = &pinctrl_2; > }; > > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0x900>; > + }; Please match the unit-address with the reg (e.g. this should be cpu@900). Please do this for all the other CPU nodes. Thanks, Mark. > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0x901>; > + }; > + }; > + > sysram@02020000 { > compatible = "mmio-sram"; > reg = <0x02020000 0x20000>; > diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi > index 3c00e6e..484a2da 100644 > --- a/arch/arm/boot/dts/exynos4212.dtsi > +++ b/arch/arm/boot/dts/exynos4212.dtsi > @@ -22,6 +22,23 @@ > / { > compatible = "samsung,exynos4212", "samsung,exynos4"; > > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA00>; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA01>; > + }; > + }; > + > combiner: interrupt-controller@10440000 { > samsung,combiner-nr = <18>; > }; > diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi > index c42a3e1..89f4743 100644 > --- a/arch/arm/boot/dts/exynos4412.dtsi > +++ b/arch/arm/boot/dts/exynos4412.dtsi > @@ -22,6 +22,35 @@ > / { > compatible = "samsung,exynos4412", "samsung,exynos4"; > > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA00>; > + }; > + > + cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA01>; > + }; > + > + cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA02>; > + }; > + > + cpu@3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0xA03>; > + }; > + }; > + > combiner: interrupt-controller@10440000 { > samsung,combiner-nr = <20>; > }; > -- > 1.8.2.3 > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
On Fri, Jul 18, 2014 at 5:00 PM, Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> wrote: > Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation > when topology is read from DT") fixed GIC driver to filter cluster ID > from values returned by cpu_logical_map() for SoCs having registers > mapped without per-CPU banking making it is possible to add CPU nodes > for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also > required by future changes adding initialization of cpuidle states in > Exynos cpuidle driver through DT. This conflicts with work in the thread "cpufreq: use generic cpufreq drivers for exynos platforms" which is already in its 7th iteration. Perhaps best to work directly with Thomas to help him finish that series? Daniel
Hi, On Monday, July 21, 2014 01:43:53 PM Daniel Drake wrote: > On Fri, Jul 18, 2014 at 5:00 PM, Bartlomiej Zolnierkiewicz > <b.zolnierkie@samsung.com> wrote: > > Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation > > when topology is read from DT") fixed GIC driver to filter cluster ID > > from values returned by cpu_logical_map() for SoCs having registers > > mapped without per-CPU banking making it is possible to add CPU nodes > > for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also > > required by future changes adding initialization of cpuidle states in > > Exynos cpuidle driver through DT. > > This conflicts with work in the thread "cpufreq: use generic cpufreq > drivers for exynos platforms" which is already in its 7th iteration. > Perhaps best to work directly with Thomas to help him finish that series? Patch "[PATCH v7 4/6] ARM: dts: Exynos: add cpu nodes, opp and cpu clock configuration data" from Thomas needs another revision anyway since it lacks cluster ID in Exynos4210 CPU node. It also mixes addition of CPU nodes with cpufreq specific changes and IMHO addition of CPU nodes should be in separate patch to ease bisection if any later problems turn up. Therefore I think that it would be the best if Thomas would rebase his work on top of "irqchip: gic: Fix core ID calculation when topology is read from DT" patch and this one. Thomas, are you okay with this? Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics
On Mon, Jul 21, 2014 at 6:40 PM, Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> wrote: > > Hi, > > On Monday, July 21, 2014 01:43:53 PM Daniel Drake wrote: >> On Fri, Jul 18, 2014 at 5:00 PM, Bartlomiej Zolnierkiewicz >> <b.zolnierkie@samsung.com> wrote: >> > Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation >> > when topology is read from DT") fixed GIC driver to filter cluster ID >> > from values returned by cpu_logical_map() for SoCs having registers >> > mapped without per-CPU banking making it is possible to add CPU nodes >> > for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also >> > required by future changes adding initialization of cpuidle states in >> > Exynos cpuidle driver through DT. >> >> This conflicts with work in the thread "cpufreq: use generic cpufreq >> drivers for exynos platforms" which is already in its 7th iteration. >> Perhaps best to work directly with Thomas to help him finish that series? > > Patch "[PATCH v7 4/6] ARM: dts: Exynos: add cpu nodes, opp and cpu clock > configuration data" from Thomas needs another revision anyway since it lacks > cluster ID in Exynos4210 CPU node. It also mixes addition of CPU nodes > with cpufreq specific changes and IMHO addition of CPU nodes should be in > separate patch to ease bisection if any later problems turn up. Therefore > I think that it would be the best if Thomas would rebase his work on top of > "irqchip: gic: Fix core ID calculation when topology is read from DT" patch > and this one. Thomas, are you okay with this? Hi Bartlomiej, Yes, I am okay with this. Regards, Thomas. > > Best regards, > -- > Bartlomiej Zolnierkiewicz > Samsung R&D Institute Poland > Samsung Electronics > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index ee3001f..b99fc83 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -31,6 +31,23 @@ pinctrl2 = &pinctrl_2; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x900>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x901>; + }; + }; + sysram@02020000 { compatible = "mmio-sram"; reg = <0x02020000 0x20000>; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 3c00e6e..484a2da 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -22,6 +22,23 @@ / { compatible = "samsung,exynos4212", "samsung,exynos4"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA00>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA01>; + }; + }; + combiner: interrupt-controller@10440000 { samsung,combiner-nr = <18>; }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index c42a3e1..89f4743 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -22,6 +22,35 @@ / { compatible = "samsung,exynos4412", "samsung,exynos4"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA00>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA01>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA02>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xA03>; + }; + }; + combiner: interrupt-controller@10440000 { samsung,combiner-nr = <20>; };
Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation when topology is read from DT") fixed GIC driver to filter cluster ID from values returned by cpu_logical_map() for SoCs having registers mapped without per-CPU banking making it is possible to add CPU nodes for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also required by future changes adding initialization of cpuidle states in Exynos cpuidle driver through DT. Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC). Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> --- Based on next-20140717 branch of linux-next tree + - [PATCH 2/6] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg32811.html - [PATCH] irqchip: gic: Fix core ID calculation when topology is read from DT http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34277.html arch/arm/boot/dts/exynos4210.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/exynos4212.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 29 +++++++++++++++++++++++++++++ 3 files changed, 63 insertions(+)