From patchwork Wed Apr 29 09:43:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lin, Mengdong" X-Patchwork-Id: 6294321 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5F2CB9F326 for ; Wed, 29 Apr 2015 09:34:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5FE0A20306 for ; Wed, 29 Apr 2015 09:34:55 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 0A4AA2012D for ; Wed, 29 Apr 2015 09:34:54 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 383202604EA; Wed, 29 Apr 2015 11:34:53 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 37C1A265804; Wed, 29 Apr 2015 11:33:36 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 7E37726581B; Wed, 29 Apr 2015 11:33:35 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by alsa0.perex.cz (Postfix) with ESMTP id A46DC2604EA for ; Wed, 29 Apr 2015 11:32:53 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 29 Apr 2015 02:32:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,670,1422950400"; d="scan'208";a="717650914" Received: from amanda-hsw-pc.sh.intel.com ([10.239.159.28]) by fmsmga002.fm.intel.com with ESMTP; 29 Apr 2015 02:32:50 -0700 From: mengdong.lin@intel.com To: alsa-devel@alsa-project.org, tiwai@suse.de Date: Wed, 29 Apr 2015 17:43:36 +0800 Message-Id: <077fe61f0236a60538693a5ea5e80a65996d9790.1430300071.git.mengdong.lin@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: Cc: Mengdong Lin Subject: [alsa-devel] [PATCH v3 4/5] ALSA: hda - divide controller and codec dependency on i915 gfx power well X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mengdong Lin This patch can improve power saving for Intel platforms on which only the display audio codec is in the shared i915 power well: - Add a flag "need_i915_power" to indicate whether the controller needs the i915 power well. - The driver will always request the i915 power when probing the controller and codecs if AZX_DCAPS_I915_POWERWELL is set (either the controller or a codec needs this power). - If the controller needs the i915 power, the power will be held after probe until the controller is runtime suspended or S3. If the controller doesn't need the power, the power will be released the after probe, and a codec that needs the power can request/release the power via bus link_power ops. Background: - For Haswell/Broadwell, which has a separate HD-A controller for display audio, both the controller and the display codec are in the i915 power well. - For Baytrail/Braswell, the display and analog audio share the same HDA controller and link, and only the display codec is in the i915 power well. - For Skylake, the display and analog audio share the same HDA controller but use separate links. Only the display codec is in the i915 power well. And in legacy mode we take the two links as one. So it can follow Baytrail/Braswell. Signed-off-by: Mengdong Lin diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index d70b405..98e721b 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -817,7 +817,8 @@ static int azx_suspend(struct device *dev) if (chip->msi) pci_disable_msi(chip->pci); - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL + && hda->need_i915_power) hda_display_power(hda, false); return 0; } @@ -837,7 +838,8 @@ static int azx_resume(struct device *dev) if (chip->disabled || hda->init_failed) return 0; - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL + && hda->need_i915_power) { hda_display_power(hda, true); haswell_set_bclk(hda); } @@ -880,7 +882,8 @@ static int azx_runtime_suspend(struct device *dev) azx_stop_chip(chip); azx_enter_link_reset(chip); azx_clear_irq_pending(chip); - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL + && hda->need_i915_power) hda_display_power(hda, false); return 0; @@ -905,7 +908,8 @@ static int azx_runtime_resume(struct device *dev) if (!azx_has_pm_runtime(chip)) return 0; - if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL + && hda->need_i915_power) { hda_display_power(hda, true); haswell_set_bclk(hda); } @@ -1126,7 +1130,8 @@ static int azx_free(struct azx *chip) release_firmware(chip->fw); #endif if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { - hda_display_power(hda, false); + if (hda->need_i915_power) + hda_display_power(hda, false); hda_i915_exit(hda); } kfree(hda); @@ -1891,17 +1896,26 @@ static int azx_probe_continue(struct azx *chip) int err; hda->probe_continued = 1; - /* Request power well for Haswell HDA controller and codec */ + + /* Request display power well for the HDA controller or codec. For + * Haswell/Broadwell, both the display HDA controller and codec need + * this power. For other platforms, like Baytrail/Braswell, only the + * display codec needs the power and it can be released after probe. + */ if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) { + /* Assume the controller needs the power by default */ + hda->need_i915_power = 1; + #ifdef CONFIG_SND_HDA_I915 err = hda_i915_init(hda); if (err < 0) - goto out_free; + goto i915_power_fail; + err = hda_display_power(hda, true); if (err < 0) { dev_err(chip->card->dev, "Cannot turn on display power on i915\n"); - goto out_free; + goto i915_power_fail; } #endif } @@ -1948,6 +1962,11 @@ static int azx_probe_continue(struct azx *chip) pm_runtime_put_noidle(&pci->dev); out_free: + if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL + && !hda->need_i915_power) + hda_display_power(hda, false); + +i915_power_fail: if (err < 0) hda->init_failed = 1; complete_all(&hda->probe_wait); diff --git a/sound/pci/hda/hda_intel.h b/sound/pci/hda/hda_intel.h index dc1d3ff..505f987 100644 --- a/sound/pci/hda/hda_intel.h +++ b/sound/pci/hda/hda_intel.h @@ -45,6 +45,7 @@ struct hda_intel { struct dev_pm_domain hdmi_pm_domain; /* i915 component interface */ + bool need_i915_power:1; /* the hda controller needs i915 power */ struct i915_audio_component audio_component; int i915_power_refcount; };