From patchwork Mon Mar 3 04:44:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dylan Reid X-Patchwork-Id: 3750981 X-Patchwork-Delegate: tiwai@suse.de Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7A4259F35F for ; Mon, 3 Mar 2014 04:45:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 91C1220304 for ; Mon, 3 Mar 2014 04:45:50 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 4D2CF20263 for ; Mon, 3 Mar 2014 04:45:49 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 4AEB02655B3; Mon, 3 Mar 2014 05:45:48 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id C1F9B265554; Mon, 3 Mar 2014 05:45:12 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 928E5265552; Mon, 3 Mar 2014 05:45:10 +0100 (CET) Received: from mail-oa0-f74.google.com (mail-oa0-f74.google.com [209.85.219.74]) by alsa0.perex.cz (Postfix) with ESMTP id EAE3426553C for ; Mon, 3 Mar 2014 05:44:27 +0100 (CET) Received: by mail-oa0-f74.google.com with SMTP id i7so222716oag.5 for ; Sun, 02 Mar 2014 20:44:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OMxIXlnVPDT1C9FtE7TFG4KZ2EwbNEiQ86TGntWPtOo=; b=AdzxVD1lBKz9Rgwx/gRv+7BDXcCmU21iEKD+YRK/t/QnLA3CSdWbZwfPZJoHwHCMVB suSCBlnSW6Uai/Qas7XhFoEnkrQ7eposl+kTpyynrYLYVenxygAwsdkyE/pcaGeV8PEZ HJSdmvCv+b6/dCoZvxkRYaIl+fEjC9paCCpeysAZo5vr4zEYRGqrruXCMw148L5Xxmzy unl2Ps/oXi6NQr1orIM5gi2EDtA1QbTeNfdgK2l0NtjDSaqVFthEH9G/GxdODsx2SU1g 79+S1cbcGzsWG9VpxTSSxTvh2BWVza1nepvTQ7YsfXR44vXsdlcu8mm5vgPbdQqPC7aU FvlQ== X-Gm-Message-State: ALoCoQl7hp5wbI9eYscB0jMGrmKEMVC8isAVvRU3o5Lubl2uLx7Mv2AZo1PyEHObhzQzhKq3S6E+PUg7hc3hQf6wR/GFHh76uSQKGhkoKs6iFDVK4zlbc542Yn7wuB2nCeYRx1MnrIUOIumOZeByV77q516csjy1oGdgMqAPLhyyWkKErJPMaq6Uft48elehR26h4gguK2uJWUBSpqyXwnbx0/rqeDdVDul+qnLMSgdcZSk+nxMlVkU= X-Received: by 10.42.115.129 with SMTP id k1mr10261681icq.25.1393821866750; Sun, 02 Mar 2014 20:44:26 -0800 (PST) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id k45si1663959yhn.4.2014.03.02.20.44.26 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 02 Mar 2014 20:44:26 -0800 (PST) Received: from hojo20.mtv.corp.google.com (hojo20.mtv.corp.google.com [172.22.72.28]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 86FA031C1CD; Sun, 2 Mar 2014 20:44:26 -0800 (PST) Received: by hojo20.mtv.corp.google.com (Postfix, from userid 123195) id 441D51806FF; Sun, 2 Mar 2014 20:44:26 -0800 (PST) From: Dylan Reid To: alsa-devel@alsa-project.org Date: Sun, 2 Mar 2014 20:44:01 -0800 Message-Id: <1393821841-4133-3-git-send-email-dgreid@chromium.org> X-Mailer: git-send-email 1.8.1.3.605.g02339dd In-Reply-To: <1393821841-4133-1-git-send-email-dgreid@chromium.org> References: <1393821841-4133-1-git-send-email-dgreid@chromium.org> Cc: tiwai@suse.de, Dylan Reid Subject: [alsa-devel] [PATCH 3/3] ALSA: hda - Mark reg op args as iomem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The ops to read and write registers should take pointers labeled as __iomem. Thanks to the sparse bot for catching this. Signed-off-by: Dylan Reid --- sound/pci/hda/hda_intel.c | 12 ++++++------ sound/pci/hda/hda_priv.h | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 149c00b..77ca894 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -1431,32 +1431,32 @@ static void azx_firmware_cb(const struct firmware *fw, void *context) */ /* PCI register access. */ -static void pci_azx_writel(u32 value, u32 *addr) +static void pci_azx_writel(u32 value, u32 __iomem *addr) { writel(value, addr); } -static u32 pci_azx_readl(u32 *addr) +static u32 pci_azx_readl(u32 __iomem *addr) { return readl(addr); } -static void pci_azx_writew(u16 value, u16 *addr) +static void pci_azx_writew(u16 value, u16 __iomem *addr) { writew(value, addr); } -static u16 pci_azx_readw(u16 *addr) +static u16 pci_azx_readw(u16 __iomem *addr) { return readw(addr); } -static void pci_azx_writeb(u8 value, u8 *addr) +static void pci_azx_writeb(u8 value, u8 __iomem *addr) { writeb(value, addr); } -static u8 pci_azx_readb(u8 *addr) +static u8 pci_azx_readb(u8 __iomem *addr) { return readb(addr); } diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h index 198fa82..ba38b81 100644 --- a/sound/pci/hda/hda_priv.h +++ b/sound/pci/hda/hda_priv.h @@ -290,12 +290,12 @@ struct azx; /* Functions to read/write to hda registers. */ struct hda_controller_ops { /* Register Access */ - void (*reg_writel)(u32 value, u32 *addr); - u32 (*reg_readl)(u32 *addr); - void (*reg_writew)(u16 value, u16 *addr); - u16 (*reg_readw)(u16 *addr); - void (*reg_writeb)(u8 value, u8 *addr); - u8 (*reg_readb)(u8 *addr); + void (*reg_writel)(u32 value, u32 __iomem *addr); + u32 (*reg_readl)(u32 __iomem *addr); + void (*reg_writew)(u16 value, u16 __iomem *addr); + u16 (*reg_readw)(u16 __iomem *addr); + void (*reg_writeb)(u8 value, u8 __iomem *addr); + u8 (*reg_readb)(u8 __iomem *addr); /* Disable msi if supported, PCI only */ int (*disable_msi_reset_irq)(struct azx *); /* Allocation ops */