| Message ID | 1416423169-21865-10-git-send-email-kwestfie@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Nov 19, 2014 at 07:52:49PM +0100, Kenneth Westfield wrote: > From: Kenneth Westfield <kwestfie@codeaurora.org> > > Model the LPASS audio hardware for the IPQ806X. > > Change-Id: Ide1aa0d09c23d4496aa9c40e3c9878a968261f11 As Kumar mentioned, please exclude this. > Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org> > Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org> Typically, the order of these SoB should match some sort of chain of delivery: - The first should be the author of the patch - The last should match the email source (you) <-- doesn't seem to be the case > --- > arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi > index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644 > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > @@ -2,6 +2,7 @@ > > #include "skeleton.dtsi" > #include <dt-bindings/clock/qcom,gcc-ipq806x.h> > +#include <dt-bindings/clock/qcom,lcc-ipq806x.h> Neither this file nor an associated clock controller driver exists in mainline. Is there some other series this depends on? -Courtney
On Wed, November 19, 2014 2:54 pm, Courtney Cavin wrote: > On Wed, Nov 19, 2014 at 07:52:49PM +0100, Kenneth Westfield wrote: >> From: Kenneth Westfield <kwestfie@codeaurora.org> >> >> Model the LPASS audio hardware for the IPQ806X. >> >> Change-Id: Ide1aa0d09c23d4496aa9c40e3c9878a968261f11 > > As Kumar mentioned, please exclude this. > >> Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org> >> Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org> > > Typically, the order of these SoB should match some sort of chain of delivery: > - The first should be the author of the patch > - The last should match the email source (you) <-- doesn't seem to be the case > >> --- >> arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++++++ >> 1 file changed, 33 insertions(+) >> >> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi >> index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644 >> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi >> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi >> @@ -2,6 +2,7 @@ >> >> #include "skeleton.dtsi" >> #include <dt-bindings/clock/qcom,gcc-ipq806x.h> >> +#include <dt-bindings/clock/qcom,lcc-ipq806x.h> > > Neither this file nor an associated clock controller driver exists in > mainline. Is there some other series this depends on? > > -Courtney > _______________________________________________ > Alsa-devel mailing list > Alsa-devel@alsa-project.org > http://mailman.alsa-project.org/mailman/listinfo/alsa-devel > Courtney Thank you for your comments. I will separately address each comment shortly.
On Wed, Nov 19, 2014 at 10:52:49AM -0800, Kenneth Westfield wrote: > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > + sound { > + compatible = "qcom,ipq806x-snd-card"; > + status = "disabled"; > + clocks = <&lcc AHBIX_CLK>; > + clock-names = "ahbix_clk"; > + asoc-platform = <&pcm0>; > + asoc-platform-names = "lpass-pcm-mi2s"; > + asoc-cpu = <&dai_mi2s>; > + asoc-cpu-names = "lpass-cpu-dai"; > + }; This appears to be part of the board but... > + lpass-lpaif { > + compatible = "qcom,lpass-lpaif"; > + status = "disabled"; > + reg = <0x28100000 0x10000>; > + reg-names = "lpass-lpaif-mem"; > + interrupts = <0 85 1>; > + interrupt-names = "lpass-lpaif-irq"; > + }; > + > + dai_mi2s: lpass-cpu-dai { > + compatible = "qcom,lpass-cpu-dai"; > + status = "disabled"; > + clocks = <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>; > + clock-names = "mi2s_osr_clk", "mi2s_bit_clk"; > + }; > + > + pcm0: lpass-pcm-mi2s { > + compatible = "qcom,lpass-pcm-mi2s"; > + status = "disabled"; > + }; > + ...these are all part of the SoC. I'd expect these to go into separate files.
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -2,6 +2,7 @@ #include "skeleton.dtsi" #include <dt-bindings/clock/qcom,gcc-ipq806x.h> +#include <dt-bindings/clock/qcom,lcc-ipq806x.h> #include <dt-bindings/soc/qcom,gsbi.h> / { @@ -66,6 +67,38 @@ ranges; compatible = "simple-bus"; + sound { + compatible = "qcom,ipq806x-snd-card"; + status = "disabled"; + clocks = <&lcc AHBIX_CLK>; + clock-names = "ahbix_clk"; + asoc-platform = <&pcm0>; + asoc-platform-names = "lpass-pcm-mi2s"; + asoc-cpu = <&dai_mi2s>; + asoc-cpu-names = "lpass-cpu-dai"; + }; + + lpass-lpaif { + compatible = "qcom,lpass-lpaif"; + status = "disabled"; + reg = <0x28100000 0x10000>; + reg-names = "lpass-lpaif-mem"; + interrupts = <0 85 1>; + interrupt-names = "lpass-lpaif-irq"; + }; + + dai_mi2s: lpass-cpu-dai { + compatible = "qcom,lpass-cpu-dai"; + status = "disabled"; + clocks = <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>; + clock-names = "mi2s_osr_clk", "mi2s_bit_clk"; + }; + + pcm0: lpass-pcm-mi2s { + compatible = "qcom,lpass-pcm-mi2s"; + status = "disabled"; + }; + qcom_pinmux: pinmux@800000 { compatible = "qcom,ipq8064-pinctrl"; reg = <0x800000 0x4000>;