From patchwork Wed May 6 16:36:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 6351121 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1F2CDBEEE1 for ; Wed, 6 May 2015 16:38:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4049C20361 for ; Wed, 6 May 2015 16:38:06 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id E2C582015E for ; Wed, 6 May 2015 16:38:04 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 3E4CF265932; Wed, 6 May 2015 18:37:59 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 28D62261A0D; Wed, 6 May 2015 18:37:00 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 6BAE8265945; Wed, 6 May 2015 18:36:59 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by alsa0.perex.cz (Postfix) with ESMTP id 073F92617C6 for ; Wed, 6 May 2015 18:36:25 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP; 06 May 2015 09:36:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,380,1427785200"; d="scan'208";a="706191791" Received: from vkoul-udesk7.iind.intel.com ([10.223.84.34]) by fmsmga001.fm.intel.com with ESMTP; 06 May 2015 09:36:22 -0700 From: Vinod Koul To: alsa-devel@alsa-project.org Date: Wed, 6 May 2015 22:06:40 +0530 Message-Id: <1430930204-32184-2-git-send-email-vinod.koul@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430930204-32184-1-git-send-email-vinod.koul@intel.com> References: <1430930204-32184-1-git-send-email-vinod.koul@intel.com> Cc: patches.audio@intel.com, praveen.diwakar@intel.com, liam.r.girdwood@linux.intel.com, yang.a.fang@intel.com, broonie@kernel.org, sathyanarayana.nujella@intel.com, Vinod Koul Subject: [alsa-devel] [PATCH 1/5] ASoC: Intel: add frame and data polarity to ssp config X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The current ssp configuration was not configuring the frame sync polarity and data polarity. Some codecs do need these different so add them in ssp configuration now Signed-off-by: Praveen Diwakar Signed-off-by: Vinod Koul --- sound/soc/intel/atom/sst-atom-controls.c | 2 ++ sound/soc/intel/atom/sst-atom-controls.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/sound/soc/intel/atom/sst-atom-controls.c b/sound/soc/intel/atom/sst-atom-controls.c index 90aa5c0476f3..59517b3fa04d 100644 --- a/sound/soc/intel/atom/sst-atom-controls.c +++ b/sound/soc/intel/atom/sst-atom-controls.c @@ -789,6 +789,8 @@ static const struct sst_ssp_config sst_ssp_configs = { .fs_frequency = SSP_FS_48_KHZ, .active_slot_map = 0xF, .start_delay = 0, + .frame_sync_polarity = SSP_FS_ACTIVE_HIGH, + .data_polarity = 1, }; int send_ssp_cmd(struct snd_soc_dai *dai, const char *id, bool enable) diff --git a/sound/soc/intel/atom/sst-atom-controls.h b/sound/soc/intel/atom/sst-atom-controls.h index c55f76a535b3..eea715605130 100644 --- a/sound/soc/intel/atom/sst-atom-controls.h +++ b/sound/soc/intel/atom/sst-atom-controls.h @@ -562,6 +562,8 @@ struct sst_ssp_config { u8 active_slot_map; u8 start_delay; u16 fs_width; + u8 frame_sync_polarity; + u8 data_polarity; }; struct sst_ssp_cfg {