From patchwork Tue Sep 29 15:59:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau?= X-Patchwork-Id: 7288131 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B2C45BEEA4 for ; Tue, 29 Sep 2015 16:00:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 044232071E for ; Tue, 29 Sep 2015 16:00:09 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 57C8120694 for ; Tue, 29 Sep 2015 16:00:04 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 3969826590E; Tue, 29 Sep 2015 18:00:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 76EAF265842; Tue, 29 Sep 2015 17:59:55 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 37180265854; Tue, 29 Sep 2015 17:59:54 +0200 (CEST) Received: from authsmtp.register.it (authsmtp93.register.it [195.110.122.178]) by alsa0.perex.cz (Postfix) with ESMTP id F19EF265821 for ; Tue, 29 Sep 2015 17:59:46 +0200 (CEST) Received: from rad-ubuntu.home ([90.25.112.137]) by paganini33 with id P3ze1r00z2xv6ya013zhmE; Tue, 29 Sep 2015 17:59:46 +0200 X-Rid: benoit@wsystem.com@90.25.112.137 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= To: alsa-devel@alsa-project.org Date: Tue, 29 Sep 2015 17:59:14 +0200 Message-Id: <1443542354-14746-1-git-send-email-benoit@wsystem.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <20150929153512.GX30445@sirena.org.uk> References: <20150929153512.GX30445@sirena.org.uk> MIME-Version: 1.0 Cc: Xiubo Li , Liam Girdwood , Timur Tabi , Nicolin Chen , Mark Brown , =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Subject: [alsa-devel] [PATCH][RESEND] ASoC: imx-ssi: Fix DAI hardware signal inversions X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP SND_SOC_DAIFMT_{IB|NB}_{IF|NF} are defined as inverting or not BCLK or FRM relatively to what is standard for the specified DAI hardware audio format. Consequently, the absolute polarities of these signals cannot be derived only from these settings as this driver did. The format has to be taken into account too. This fixes inverted left/right channels in I²S mode. Signed-off-by: Benoît Thébaudeau Acked-by: Nicolin Chen --- sound/soc/fsl/imx-ssi.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c index 48b2d24..b95132e 100644 --- a/sound/soc/fsl/imx-ssi.c +++ b/sound/soc/fsl/imx-ssi.c @@ -95,7 +95,8 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: /* data on rising edge of bclk, frame low 1clk before data */ - strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0; + strcr |= SSI_STCR_TXBIT0 | SSI_STCR_TSCKP | SSI_STCR_TFSI | + SSI_STCR_TEFS; scr |= SSI_SCR_NET; if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) { scr &= ~SSI_I2S_MODE_MASK; @@ -104,33 +105,31 @@ static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) break; case SND_SOC_DAIFMT_LEFT_J: /* data on rising edge of bclk, frame high with data */ - strcr |= SSI_STCR_TXBIT0; + strcr |= SSI_STCR_TXBIT0 | SSI_STCR_TSCKP; break; case SND_SOC_DAIFMT_DSP_B: /* data on rising edge of bclk, frame high with data */ - strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0; + strcr |= SSI_STCR_TXBIT0 | SSI_STCR_TSCKP | SSI_STCR_TFSL; break; case SND_SOC_DAIFMT_DSP_A: /* data on rising edge of bclk, frame high 1clk before data */ - strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS; + strcr |= SSI_STCR_TXBIT0 | SSI_STCR_TSCKP | SSI_STCR_TFSL | + SSI_STCR_TEFS; break; } /* DAI clock inversion */ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_IB_IF: - strcr |= SSI_STCR_TFSI; - strcr &= ~SSI_STCR_TSCKP; + strcr ^= SSI_STCR_TSCKP | SSI_STCR_TFSI; break; case SND_SOC_DAIFMT_IB_NF: - strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI); + strcr ^= SSI_STCR_TSCKP; break; case SND_SOC_DAIFMT_NB_IF: - strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP; + strcr ^= SSI_STCR_TFSI; break; case SND_SOC_DAIFMT_NB_NF: - strcr &= ~SSI_STCR_TFSI; - strcr |= SSI_STCR_TSCKP; break; }