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[4/7] ASoC: Intel: Skylake: Update pcm capability

Message ID 1448297789-6524-5-git-send-email-vinod.koul@intel.com (mailing list archive)
State Accepted
Commit 06b23d9379d4cd034b7a5edad323ea9419ab2016
Headers show

Commit Message

Vinod Koul Nov. 23, 2015, 4:56 p.m. UTC 
From: Jeeja KP <jeeja.kp@intel.com>

This patch adds pcm capability to support 16/8k rates and 32 bit formats

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
---
 sound/soc/intel/skylake/skl-pcm.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c
index 43944aff8dcb..787fd3c0cc4e 100644
--- a/sound/soc/intel/skylake/skl-pcm.c
+++ b/sound/soc/intel/skylake/skl-pcm.c
@@ -40,9 +40,12 @@  static struct snd_pcm_hardware azx_pcm_hw = {
 				 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
 				 SNDRV_PCM_INFO_HAS_LINK_ATIME |
 				 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
-	.formats =		SNDRV_PCM_FMTBIT_S16_LE,
-	.rates =		SNDRV_PCM_RATE_48000,
-	.rate_min =		48000,
+	.formats =		SNDRV_PCM_FMTBIT_S16_LE |
+				SNDRV_PCM_FMTBIT_S32_LE |
+				SNDRV_PCM_FMTBIT_S24_LE,
+	.rates =		SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_8000,
+	.rate_min =		8000,
 	.rate_max =		48000,
 	.channels_min =		2,
 	.channels_max =		2,