diff mbox

[01/16] ASoC: Intel: Skylake: Update DMIC DAIs and capabilities

Message ID 1448703121-5831-2-git-send-email-vinod.koul@intel.com (mailing list archive)
State Accepted
Commit 8f35bf3f71f7b367511e0912eb7b70834b39ef77
Headers show

Commit Message

Vinod Koul Nov. 28, 2015, 9:31 a.m. UTC 
From: Jeeja KP <jeeja.kp@intel.com>

On Skylake we can support upton 4DMICs on the PDM port, so update
the PCM capabilities accordingly

Also add a new DAI for DMIC pin which can be used for getting raw
DMIC data

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Dharageswari.R <dharageswari.r@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
---
 sound/soc/intel/skylake/skl-pcm.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

Comments

Mark Brown Dec. 1, 2015, 9:32 p.m. UTC | #1 
On Sat, Nov 28, 2015 at 03:01:46PM +0530, Vinod Koul wrote:

>  #define HDA_MONO 1
>  #define HDA_STEREO 2
> +#define HDA_QUAD 4

Are these defines really helping clarify things?
Vinod Koul Dec. 2, 2015, 4:53 a.m. UTC | #2 
On Tue, Dec 01, 2015 at 09:32:51PM +0000, Mark Brown wrote:
> On Sat, Nov 28, 2015 at 03:01:46PM +0530, Vinod Koul wrote:
> 
> >  #define HDA_MONO 1
> >  #define HDA_STEREO 2
> > +#define HDA_QUAD 4
> 
> Are these defines really helping clarify things?

hmm, that is a good point :) Since we already had 1, 2 4 seems a logical
choice. I dont mind either way
Mark Brown Dec. 3, 2015, 12:59 a.m. UTC | #3 
On Wed, Dec 02, 2015 at 10:23:59AM +0530, Vinod Koul wrote:
> On Tue, Dec 01, 2015 at 09:32:51PM +0000, Mark Brown wrote:
> > On Sat, Nov 28, 2015 at 03:01:46PM +0530, Vinod Koul wrote:

> > >  #define HDA_MONO 1
> > >  #define HDA_STEREO 2
> > > +#define HDA_QUAD 4

> > Are these defines really helping clarify things?

> hmm, that is a good point :) Since we already had 1, 2 4 seems a logical
> choice. I dont mind either way

I think I'd prefer to just use the numbers, it's not like HDA uses a
different definition of stereo to anything else.
diff mbox

Patch

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c
index c79bbff00cb7..6570e5753e49 100644
--- a/sound/soc/intel/skylake/skl-pcm.c
+++ b/sound/soc/intel/skylake/skl-pcm.c
@@ -28,6 +28,7 @@ 
 
 #define HDA_MONO 1
 #define HDA_STEREO 2
+#define HDA_QUAD 4
 
 static struct snd_pcm_hardware azx_pcm_hw = {
 	.info =			(SNDRV_PCM_INFO_MMAP |
@@ -46,8 +47,8 @@  static struct snd_pcm_hardware azx_pcm_hw = {
 				SNDRV_PCM_RATE_8000,
 	.rate_min =		8000,
 	.rate_max =		48000,
-	.channels_min =		2,
-	.channels_max =		2,
+	.channels_min =		1,
+	.channels_max =		HDA_QUAD,
 	.buffer_bytes_max =	AZX_MAX_BUF_SIZE,
 	.period_bytes_min =	128,
 	.period_bytes_max =	AZX_MAX_BUF_SIZE / 2,
@@ -560,7 +561,7 @@  static struct snd_soc_dai_driver skl_platform_dai[] = {
 	.capture = {
 		.stream_name = "Reference Capture",
 		.channels_min = HDA_MONO,
-		.channels_max = HDA_STEREO,
+		.channels_max = HDA_QUAD,
 		.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 	},
@@ -587,6 +588,18 @@  static struct snd_soc_dai_driver skl_platform_dai[] = {
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 	},
 },
+{
+	.name = "DMIC Pin",
+	.ops = &skl_pcm_dai_ops,
+	.capture = {
+		.stream_name = "DMIC Capture",
+		.channels_min = HDA_MONO,
+		.channels_max = HDA_QUAD,
+		.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
+	},
+},
+
 /* BE CPU  Dais */
 {
 	.name = "SSP0 Pin",
@@ -640,8 +653,8 @@  static struct snd_soc_dai_driver skl_platform_dai[] = {
 	.ops = &skl_dmic_dai_ops,
 	.capture = {
 		.stream_name = "DMIC01 Rx",
-		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_min = HDA_MONO,
+		.channels_max = HDA_QUAD,
 		.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
 	},