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[10/11] ASoC: Intel: Skylake: Fix stereo DMIC record

Message ID 1454502594-21700-11-git-send-email-vinod.koul@intel.com (mailing list archive)
State Accepted
Commit 6e3ffa00424e198d2f0c628e7575c5adefeda3d7
Headers show

Commit Message

Vinod Koul Feb. 3, 2016, 12:29 p.m. UTC 
From: Jeeja KP <jeeja.kp@intel.com>

DMIC BE can have 2 or 4 channels supported. The DMIC fixup needs
to take this into account.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
---
 sound/soc/intel/boards/skl_rt286.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
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Patch

diff --git a/sound/soc/intel/boards/skl_rt286.c b/sound/soc/intel/boards/skl_rt286.c
index 7396ddb427d8..2cbcbe412661 100644
--- a/sound/soc/intel/boards/skl_rt286.c
+++ b/sound/soc/intel/boards/skl_rt286.c
@@ -212,7 +212,10 @@  static int skylake_dmic_fixup(struct snd_soc_pcm_runtime *rtd,
 {
 	struct snd_interval *channels = hw_param_interval(params,
 						SNDRV_PCM_HW_PARAM_CHANNELS);
-	channels->min = channels->max = 4;
+	if (params_channels(params) == 2)
+		channels->min = channels->max = 2;
+	else
+		channels->min = channels->max = 4;
 
 	return 0;
 }