From patchwork Fri Apr 29 10:53:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 8979741 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 226B2BF29F for ; Fri, 29 Apr 2016 10:54:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4778820212 for ; Fri, 29 Apr 2016 10:53:59 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 0A46020218 for ; Fri, 29 Apr 2016 10:53:58 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id B4EF626518B; Fri, 29 Apr 2016 12:53:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 4F2032651B4; Fri, 29 Apr 2016 12:53:45 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id C10242651B4; Fri, 29 Apr 2016 12:53:43 +0200 (CEST) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by alsa0.perex.cz (Postfix) with ESMTP id 0C1972661B9 for ; Fri, 29 Apr 2016 12:53:33 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u3TArXIn006778; Fri, 29 Apr 2016 05:53:33 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3TArXIh015526; Fri, 29 Apr 2016 05:53:33 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Fri, 29 Apr 2016 05:53:32 -0500 Received: from dflp32.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3TArPKi016445; Fri, 29 Apr 2016 05:53:29 -0500 From: Peter Ujfalusi To: , , , , Date: Fri, 29 Apr 2016 13:53:16 +0300 Message-ID: <1461927202-17677-2-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1461927202-17677-1-git-send-email-peter.ujfalusi@ti.com> References: <1461927202-17677-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, t-kristo@ti.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH v3 1/7] ARM: OMAP3: hwmod data: Fix McBSP2/3 sidetone data X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The McBSPLP's sidetone main clock is the McBSPLP's ICLK, not FCLK as the sidetone only receives the ICLK from the main McBSP module. Since the McBSP and sidetone is using the very same clock from PRCM level the sidetone must not have the prcm section to check the clock status since the sidetone is only used when McBSP is already configured. If two separate hwmods looking at the same bit and they would use pm_runtime in nested way (as it must happen with McBSP and it's ST module) the hwmod would warn, because the idlest will not match what it is expected after enable/disable of the clocks. Signed-off-by: Peter Ujfalusi --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 9869a75c5d96..d72ee6185d5e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1322,16 +1322,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP3430_EN_MCBSP2_SHIFT, - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, - }, - }, + .main_clk = "mcbsp2_ick", + .flags = HWMOD_NO_IDLEST, }; /* mcbsp3_sidetone */ @@ -1344,16 +1336,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP3430_EN_MCBSP3_SHIFT, - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, - }, - }, + .main_clk = "mcbsp3_ick", + .flags = HWMOD_NO_IDLEST, }; /* SR common */