From patchwork Thu May 18 15:19:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 9734655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E1343600CC for ; Thu, 18 May 2017 15:20:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C8084288A7 for ; Thu, 18 May 2017 15:20:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BB827288A9; Thu, 18 May 2017 15:20:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B8FD28879 for ; Thu, 18 May 2017 15:20:29 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 814D52671E9; Thu, 18 May 2017 17:20:14 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 2FF1A2671EB; Thu, 18 May 2017 17:20:13 +0200 (CEST) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by alsa0.perex.cz (Postfix) with ESMTP id 43FDA2671DE for ; Thu, 18 May 2017 17:20:05 +0200 (CEST) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v4IF9GMj029519; Thu, 18 May 2017 17:20:03 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 2ahd228cb6-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 18 May 2017 17:20:03 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2114D38; Thu, 18 May 2017 15:20:03 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E82AF24CF; Thu, 18 May 2017 15:20:02 +0000 (GMT) Received: from localhost (10.48.0.208) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.339.0; Thu, 18 May 2017 17:20:02 +0200 From: olivier moysan To: , , , , , , , , , , , , , Date: Thu, 18 May 2017 17:19:53 +0200 Message-ID: <1495120793-11687-4-git-send-email-olivier.moysan@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495120793-11687-1-git-send-email-olivier.moysan@st.com> References: <1495120793-11687-1-git-send-email-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.208] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-05-18_04:, , signatures=0 Cc: arnaud.pouliquen@st.com, benjamin.gaignard@st.com Subject: [alsa-devel] [PATCH v4 3/3] ASoC: stm32: Add full duplex support to i2s X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP This patch allows to use i2s interface either as single audio path (rx or tx), or bidirectional audio path. This patch is added separately, as the driver does not follow recommended use of the interface, to support this configuration. Signed-off-by: olivier moysan --- sound/soc/stm/stm32_i2s.c | 87 +++++++++++++++++++++++++---------------------- 1 file changed, 46 insertions(+), 41 deletions(-) diff --git a/sound/soc/stm/stm32_i2s.c b/sound/soc/stm/stm32_i2s.c index 22152a1..8052629 100644 --- a/sound/soc/stm/stm32_i2s.c +++ b/sound/soc/stm/stm32_i2s.c @@ -489,7 +489,6 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); int format = params_width(params); u32 cfgr, cfgr_mask, cfg1, cfg1_mask; - bool playback_flg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); unsigned int fthlv; int ret; @@ -515,19 +514,13 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, } if (STM32_I2S_IS_SLAVE(i2s)) { - if (playback_flg) - cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_TX_SLAVE); - else - cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_RX_SLAVE); + cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_SLAVE); /* As data length is either 16 or 32 bits, fixch always set */ cfgr |= I2S_CGFR_FIXCH; cfgr_mask |= I2S_CGFR_FIXCH; } else { - if (playback_flg) - cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_TX_MASTER); - else - cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_RX_MASTER); + cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_MASTER); } cfgr_mask |= I2S_CGFR_I2SCFG_MASK; @@ -536,9 +529,7 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, if (ret < 0) return ret; - cfg1 = I2S_CFG1_RXDMAEN; - if (playback_flg) - cfg1 = I2S_CFG1_TXDMAEN; + cfg1 = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN; cfg1_mask = cfg1; fthlv = STM32_I2S_FIFO_SIZE * I2S_FIFO_TH_ONE_QUARTER / 4; @@ -553,32 +544,15 @@ static int stm32_i2s_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *cpu_dai) { struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); - int ret, ier; i2s->substream = substream; spin_lock(&i2s->lock_fd); - if (i2s->refcount) { - dev_err(cpu_dai->dev, "%s stream already started\n", - (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? - "Capture" : "Playback")); - spin_unlock(&i2s->lock_fd); - return -EBUSY; - } - i2s->refcount = 1; + i2s->refcount++; spin_unlock(&i2s->lock_fd); - ret = regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG, - I2S_IFCR_MASK, I2S_IFCR_MASK); - if (ret < 0) - return ret; - - /* Enable ITs */ - ier = I2S_IER_OVRIE | I2S_IER_UDRIE; - if (STM32_I2S_IS_SLAVE(i2s)) - ier |= I2S_IER_TIFREIE; - - return regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, ier, ier); + return regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG, + I2S_IFCR_MASK, I2S_IFCR_MASK); } static int stm32_i2s_hw_params(struct snd_pcm_substream *substream, @@ -605,7 +579,7 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd, { struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai); bool playback_flg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); - u32 cfg1_mask; + u32 cfg1_mask, ier; int ret; switch (cmd) { @@ -628,10 +602,48 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd, dev_err(cpu_dai->dev, "Error %d starting I2S\n", ret); return ret; } + + regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG, + I2S_IFCR_MASK, I2S_IFCR_MASK); + + if (playback_flg) { + ier = I2S_IER_UDRIE; + } else { + ier = I2S_IER_OVRIE; + + spin_lock(&i2s->lock_fd); + if (i2s->refcount == 1) + /* dummy write to trigger capture */ + regmap_write(i2s->regmap, + STM32_I2S_TXDR_REG, 0); + spin_unlock(&i2s->lock_fd); + } + + if (STM32_I2S_IS_SLAVE(i2s)) + ier |= I2S_IER_TIFREIE; + + regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, ier, ier); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (playback_flg) + regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, + I2S_IER_UDRIE, + (unsigned int)~I2S_IER_UDRIE); + else + regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, + I2S_IER_OVRIE, + (unsigned int)~I2S_IER_OVRIE); + + spin_lock(&i2s->lock_fd); + i2s->refcount--; + if (i2s->refcount) { + spin_unlock(&i2s->lock_fd); + break; + } + spin_unlock(&i2s->lock_fd); + dev_dbg(cpu_dai->dev, "stop I2S\n"); ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG, @@ -641,10 +653,7 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd, return ret; } - cfg1_mask = I2S_CFG1_RXDMAEN; - if (playback_flg) - cfg1_mask = I2S_CFG1_TXDMAEN; - + cfg1_mask = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN; regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG, cfg1_mask, 0); break; @@ -662,10 +671,6 @@ static void stm32_i2s_shutdown(struct snd_pcm_substream *substream, i2s->substream = NULL; - spin_lock(&i2s->lock_fd); - i2s->refcount = 0; - spin_unlock(&i2s->lock_fd); - regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, I2S_CGFR_MCKOE, (unsigned int)~I2S_CGFR_MCKOE); }