From patchwork Tue Jun 6 06:59:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oder Chiou X-Patchwork-Id: 9768125 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 55FA060352 for ; Tue, 6 Jun 2017 07:07:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4835B28397 for ; Tue, 6 Jun 2017 07:07:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B5792841E; Tue, 6 Jun 2017 07:07:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3CBFA28397 for ; Tue, 6 Jun 2017 07:07:52 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id A86A8266D12; Tue, 6 Jun 2017 09:00:22 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 21058266E0C; Tue, 6 Jun 2017 09:00:21 +0200 (CEST) Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by alsa0.perex.cz (Postfix) with ESMTP id 3513B2668E2 for ; Tue, 6 Jun 2017 09:00:16 +0200 (CEST) Authenticated-By: X-SpamFilter-By: BOX Solutions SpamTrap 5.59 with qID v567084n005125, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtitcas11.realtek.com.tw [172.21.6.12]) by rtits2.realtek.com.tw (8.15.2/2.55/5.73) with ESMTP id v567084n005125; Tue, 6 Jun 2017 15:00:08 +0800 Received: from RTITCASV01.realtek.com.tw (172.21.6.18) by RTITCAS11.realtek.com.tw (172.21.6.12) with Microsoft SMTP Server (TLS) id 14.3.351.0; Tue, 6 Jun 2017 15:00:08 +0800 Received: from localhost.localdomain (172.21.85.85) by RTITCASV01.realtek.com.tw (172.21.6.18) with Microsoft SMTP Server id 14.3.294.0; Tue, 6 Jun 2017 15:00:08 +0800 From: Oder Chiou To: , Date: Tue, 6 Jun 2017 14:59:54 +0800 Message-ID: <1496732394-21460-1-git-send-email-oder_chiou@realtek.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [172.21.85.85] Cc: Oder Chiou , jack.yu@realtek.com, alsa-devel@alsa-project.org, hychao@google.com, albertchen@realtek.com, shumingf@realtek.com, bardliao@realtek.com, flove@realtek.com Subject: [alsa-devel] [PATCH] ASoC: rt5663: Fix the IRQ issue X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The patch fixed the IRQ issue. Signed-off-by: Oder Chiou --- sound/soc/codecs/rt5663.c | 2 +- sound/soc/codecs/rt5663.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/rt5663.c b/sound/soc/codecs/rt5663.c index a32508d..8569e8c 100644 --- a/sound/soc/codecs/rt5663.c +++ b/sound/soc/codecs/rt5663.c @@ -3141,7 +3141,7 @@ static int rt5663_i2c_probe(struct i2c_client *i2c, regmap_update_bits(rt5663->regmap, RT5663_DIG_MISC, RT5663_DIG_GATE_CTRL_MASK, RT5663_DIG_GATE_CTRL_EN); regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK, - RT5663_IRQ_POW_SAV_MASK, RT5663_IRQ_POW_SAV_EN); + RT5663_IRQ_MANUAL_MASK, RT5663_IRQ_MANUAL_EN); regmap_update_bits(rt5663->regmap, RT5663_IRQ_1, RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN); regmap_update_bits(rt5663->regmap, RT5663_GPIO_1, diff --git a/sound/soc/codecs/rt5663.h b/sound/soc/codecs/rt5663.h index d77fae6..4621812 100644 --- a/sound/soc/codecs/rt5663.h +++ b/sound/soc/codecs/rt5663.h @@ -590,6 +590,10 @@ #define RT5663_IRQ_POW_SAV_JD1_SHIFT 14 #define RT5663_IRQ_POW_SAV_JD1_DIS (0x0 << 14) #define RT5663_IRQ_POW_SAV_JD1_EN (0x1 << 14) +#define RT5663_IRQ_MANUAL_MASK (0x1 << 8) +#define RT5663_IRQ_MANUAL_SHIFT 8 +#define RT5663_IRQ_MANUAL_DIS (0x0 << 8) +#define RT5663_IRQ_MANUAL_EN (0x1 << 8) /* IRQ Control 1 (0x00b6) */ #define RT5663_EN_CB_JD_MASK (0x1 << 3)