From patchwork Wed Mar 21 04:16:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AS50 KCHSU0 X-Patchwork-Id: 10298517 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9B3CD600F6 for ; Wed, 21 Mar 2018 04:16:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D00E28CFB for ; Wed, 21 Mar 2018 04:16:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6EDA428D13; Wed, 21 Mar 2018 04:16:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F37A628CFB for ; Wed, 21 Mar 2018 04:16:51 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 79D0B26731A; Wed, 21 Mar 2018 05:16:49 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 45C82267321; Wed, 21 Mar 2018 05:16:47 +0100 (CET) Received: from maillog.nuvoton.com (maillog.nuvoton.com [202.39.227.15]) by alsa0.perex.cz (Postfix) with ESMTP id 0A155267219 for ; Wed, 21 Mar 2018 05:16:42 +0100 (CET) Received: from NTHCCAS02.nuvoton.com (nthccas02.nuvoton.com [10.1.8.29]) by maillog.nuvoton.com (Postfix) with ESMTP id 30BDE1C80BAA; Wed, 21 Mar 2018 12:16:38 +0800 (CST) Received: from NTHCML01B.nuvoton.com (10.1.8.178) by NTHCCAS02.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 21 Mar 2018 12:16:38 +0800 Received: from NTHCCAS01.nuvoton.com (10.1.8.28) by NTHCML01B.nuvoton.com (10.1.8.178) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 21 Mar 2018 12:16:37 +0800 Received: from localhost.localdomain (10.4.36.27) by NTHCCAS01.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Wed, 21 Mar 2018 12:16:37 +0800 From: John Hsu To: Date: Wed, 21 Mar 2018 12:16:32 +0800 Message-ID: <1521605792-17360-1-git-send-email-KCHSU0@nuvoton.com> X-Mailer: git-send-email 2.6.4 MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, WTLI@nuvoton.com, John Hsu , lgirdwood@gmail.com, YHCHuang@nuvoton.com, CTLIN0@nuvoton.com Subject: [alsa-devel] [PATCH] ASoC: nau8824: recover system clock when device changes X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP User reports an issue in Ubuntu about the device switch upon playback. We find the FLL will disalbe when switching headphone to speaker. The pulseaudio will stop the headphone and close its power. Then, it just opens the speaker and turn on its power. Therefore, the supply of system clock does the OFF event and disables FLL. But the FLL doesn't enable again when the speaker powers on. The patch adds the recovery of system clock to enable FLL again for this case. And it covers the case that system clock from MCLK. Signed-off-by: John Hsu --- sound/soc/codecs/nau8824.c | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/nau8824.c b/sound/soc/codecs/nau8824.c index 4d9148a..637e952 100644 --- a/sound/soc/codecs/nau8824.c +++ b/sound/soc/codecs/nau8824.c @@ -489,8 +489,12 @@ static int system_clock_control(struct snd_soc_dapm_widget *w, { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); struct nau8824 *nau8824 = snd_soc_component_get_drvdata(component); + struct regmap *regmap = nau8824->regmap; + unsigned int value; + bool clk_fll, error; if (SND_SOC_DAPM_EVENT_OFF(event)) { + dev_dbg(nau8824->dev, "system clock control : POWER OFF\n"); /* Set clock source to disable or internal clock before the * playback or capture end. Codec needs clock for Jack * detection and button press if jack inserted; otherwise, @@ -502,7 +506,40 @@ static int system_clock_control(struct snd_soc_dapm_widget *w, } else { nau8824_config_sysclk(nau8824, NAU8824_CLK_DIS, 0); } + } else { + dev_dbg(nau8824->dev, "system clock control : POWER ON\n"); + /* Check the clock source setting is proper or not + * no matter the source is from FLL or MCLK. + */ + regmap_read(regmap, NAU8824_REG_FLL1, &value); + clk_fll = value & NAU8824_FLL_RATIO_MASK; + /* It's error to use internal clock when playback */ + regmap_read(regmap, NAU8824_REG_FLL6, &value); + error = value & NAU8824_DCO_EN; + if (!error) { + /* Check error depending on source is FLL or MCLK. */ + regmap_read(regmap, NAU8824_REG_CLK_DIVIDER, &value); + if (clk_fll) + error = !(value & NAU8824_CLK_SRC_VCO); + else + error = value & NAU8824_CLK_SRC_VCO; + } + /* Recover the clock source setting if error. */ + if (error) { + if (clk_fll) { + regmap_update_bits(regmap, + NAU8824_REG_FLL6, NAU8824_DCO_EN, 0); + regmap_update_bits(regmap, + NAU8824_REG_CLK_DIVIDER, + NAU8824_CLK_SRC_MASK, + NAU8824_CLK_SRC_VCO); + } else { + nau8824_config_sysclk(nau8824, + NAU8824_CLK_MCLK, 0); + } + } } + return 0; } @@ -591,7 +628,8 @@ static const struct snd_kcontrol_new nau8824_dacr_mux = static const struct snd_soc_dapm_widget nau8824_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("System Clock", SND_SOC_NOPM, 0, 0, - system_clock_control, SND_SOC_DAPM_POST_PMD), + system_clock_control, SND_SOC_DAPM_POST_PMD | + SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_INPUT("HSMIC1"), SND_SOC_DAPM_INPUT("HSMIC2"),