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Mon, 16 Apr 2018 23:59:32 -0500 From: Vijendar Mukunda To: Date: Tue, 17 Apr 2018 10:29:54 +0530 Message-ID: <1523941201-15665-5-git-send-email-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523941201-15665-1-git-send-email-Vijendar.Mukunda@amd.com> References: <1523941201-15665-1-git-send-email-Vijendar.Mukunda@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(376002)(39860400002)(346002)(396003)(39380400002)(2980300002)(428003)(199004)(189003)(47776003)(2616005)(476003)(126002)(446003)(11346002)(1671002)(5660300001)(426003)(50466002)(81156014)(356003)(48376002)(336012)(68736007)(8676002)(81166006)(8936002)(77096007)(26005)(186003)(50226002)(106466001)(54906003)(53416004)(16586007)(76176011)(51416003)(316002)(7696005)(105586002)(486006)(36756003)(97736004)(72206003)(478600001)(7416002)(305945005)(6666003)(109986005)(53936002)(39060400002)(104016004)(2906002)(4326008)(575784001)(86362001)(266003); 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By default, these pins will be used for uart. After acp reset , it requires to reprogram bt i2s config mux pins to enable bt i2s instance. added bt i2s enablement sequence during acp init. Signed-off-by: Vijendar Mukunda Signed-off-by: Akshu Agrawal --- sound/soc/amd/acp-da7219-max98357a.c | 2 ++ sound/soc/amd/acp-pcm-dma.c | 9 +++++++++ sound/soc/amd/acp.h | 1 + 3 files changed, 12 insertions(+) diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c index b205c78..6dad0cb 100644 --- a/sound/soc/amd/acp-da7219-max98357a.c +++ b/sound/soc/amd/acp-da7219-max98357a.c @@ -44,6 +44,7 @@ static struct snd_soc_jack cz_jack; struct clk *da7219_dai_clk; +extern int bt_pad_enable; static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd) { @@ -81,6 +82,7 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd) } da7219_aad_jack_det(component, &cz_jack); + bt_pad_enable = device_property_read_bool(&pdev->dev, "bt-pad-enable"); return 0; } diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index 7c392fe..b52c660 100644 --- a/sound/soc/amd/acp-pcm-dma.c +++ b/sound/soc/amd/acp-pcm-dma.c @@ -46,6 +46,8 @@ #define DRV_NAME "acp_audio_dma" +bool bt_pad_enable = false; +EXPORT_SYMBOL(bt_pad_enable); static const struct snd_pcm_hardware acp_pcm_hardware_playback = { .info = SNDRV_PCM_INFO_INTERLEAVED | @@ -525,6 +527,13 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type) val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; acp_reg_write(val, acp_mmio, mmACP_SOFT_RESET); + /* For BT instance change pins from UART to BT */ + if (bt_pad_enable) { + val = acp_reg_read(acp_mmio, mmACP_BT_UART_PAD_SEL); + val |= ACP_BT_UART_PAD_SELECT_MASK; + acp_reg_write(val, acp_mmio, mmACP_BT_UART_PAD_SEL); + } + /* initiailize Onion control DAGB register */ acp_reg_write(ACP_ONION_CNTL_DEFAULT, acp_mmio, mmACP_AXI2DAGB_ONION_CNTL); diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h index 460365c..6b43144 100644 --- a/sound/soc/amd/acp.h +++ b/sound/soc/amd/acp.h @@ -107,6 +107,7 @@ #define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01 #define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02 #define ACP_I2S_BT_16BIT_RESOLUTION_EN 0x04 +#define ACP_BT_UART_PAD_SELECT_MASK 0x1 enum acp_dma_priority_level { /* 0x0 Specifies the DMA channel is given normal priority */