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a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1575600557; bh=58bH/YxtMWhNrsV4wUVHZ4xJrlV8dOfts/Bw2jOCpr4=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=KGg2JzgfH0Dan56bB5rp+Cgl62en13fYzUfsSL8S2AgXAPIQ4ghu04qRlgJgbNWaU Ds+c6oAKb+Eo5mRITm1R0IRu8QhPutL3MbnyV3XE5TKw3s1xdEO3trLSQSC2gMxteL POlN9ITT7HGzyh5iV6oL5gVQIlqEUdzrDJIym6vHI5c5YzAWBEPsxHUyTWg8ArYwMV Ynhj5MHxXVFbONUF/kLsb90+nT21QrDOd6e7/LoCRtIC8Hx6RCi63OVBgEIWIr7Em7 tfXFk+4wUdFf+9UCK7KTCFMJT5IGYTsMGJpNieT+NKokHgjqc1ckxitOOt5BvNUapg 4NRhGwBBFwHBg== X-Mailman-Approved-At: Fri, 06 Dec 2019 11:07:58 +0100 Cc: alsa-devel@alsa-project.org, pgaikwad@nvidia.com, spujar@nvidia.com, linux-kernel@vger.kernel.org, josephl@nvidia.com, linux-clk@vger.kernel.org, arnd@arndb.de, daniel.lezcano@linaro.org, krzk@kernel.org, mturquette@baylibre.com, devicetree@vger.kernel.org, mmaddireddy@nvidia.com, markz@nvidia.com, alexios.zavras@intel.com, broonie@kernel.org, linux-tegra@vger.kernel.org, horms+renesas@verge.net.au, tiwai@suse.com, allison@lohutok.net, pdeschrijver@nvidia.com, lgirdwood@gmail.com, vidyas@nvidia.com, Jisheng.Zhang@synaptics.com Subject: [alsa-devel] [PATCH v3 11/15] ARM: dts: tegra: Add clock-cells property to pmc X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Tegra PMC has clk_out_1, clk_out_2, clk_out_3 with mux and gate for each of these clocks and 32 kHz blink. These clocks are moved from clock driver to pmc driver with pmc as the clock provider for these clocks. This patch adds #clock-cells property with 1 clock specifier to the Tegra PMC node in device tree. Signed-off-by: Sowjanya Komatineni --- arch/arm/boot/dts/tegra114.dtsi | 4 +++- arch/arm/boot/dts/tegra124.dtsi | 4 +++- arch/arm/boot/dts/tegra20.dtsi | 4 +++- arch/arm/boot/dts/tegra30.dtsi | 4 +++- 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 0d7a6327e404..b8f12f24f314 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra114"; @@ -514,11 +515,12 @@ status = "disabled"; }; - pmc@7000e400 { + pmc: pmc@7000e400 { compatible = "nvidia,tegra114-pmc"; reg = <0x7000e400 0x400>; clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; + #clock-cells = <1>; }; fuse@7000f800 { diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 413bfb981de8..d0802c4ae3bf 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra124"; @@ -595,11 +596,12 @@ clocks = <&tegra_car TEGRA124_CLK_RTC>; }; - pmc@7000e400 { + pmc: pmc@7000e400 { compatible = "nvidia,tegra124-pmc"; reg = <0x0 0x7000e400 0x0 0x400>; clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; + #clock-cells = <1>; }; fuse@7000f800 { diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 9c58e7fcf5c0..85a64747bec6 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra20"; @@ -608,11 +609,12 @@ status = "disabled"; }; - pmc@7000e400 { + pmc: pmc@7000e400 { compatible = "nvidia,tegra20-pmc"; reg = <0x7000e400 0x400>; clocks = <&tegra_car TEGRA20_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; + #clock-cells = <1>; }; mc: memory-controller@7000f000 { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 55ae050042ce..4d5e9d0001d3 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra30"; @@ -714,11 +715,12 @@ status = "disabled"; }; - pmc@7000e400 { + pmc: pmc@7000e400 { compatible = "nvidia,tegra30-pmc"; reg = <0x7000e400 0x400>; clocks = <&tegra_car TEGRA30_CLK_PCLK>, <&clk32k_in>; clock-names = "pclk", "clk32k_in"; + #clock-cells = <1>; }; mc: memory-controller@7000f000 {