| Message ID | 1658741467-32620-1-git-send-email-shengjiu.wang@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ASoC: dt-bindings: fsl,sai: Convert format to json-schema | expand |
On 25/07/2022 11:31, Shengjiu Wang wrote: > Convert the NXP SAI binding to DT schema format using json-schema. > > The Synchronous Audio Interface (SAI) provides an interface that > supports full-duplex serial interfaces with frame synchronization > formats such as I2S, AC97, TDM, and codec/DSP interfaces. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > --- > .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ > .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- > 2 files changed, 175 insertions(+), 95 deletions(-) > create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml > delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt > > diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > new file mode 100644 > index 000000000000..adcd77531eba > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > @@ -0,0 +1,175 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale Synchronous Audio Interface (SAI). > + > +maintainers: > + - Shengjiu Wang <shengjiu.wang@nxp.com> > + > +description: | > + The SAI is based on I2S module that used communicating with audio codecs, > + which provides a synchronous audio interface that supports fullduplex > + serial interfaces with frame synchronization such as I2S, AC97, TDM, and > + codec/DSP interfaces. > + > +properties: > + compatible: > + minItems: 1 > + maxItems: 2 You allow anything here, so it's not acceptable. This has to be strictly defined. > + items: > + enum: > + - fsl,vf610-sai > + - fsl,imx6sx-sai > + - fsl,imx6ul-sai > + - fsl,imx7ulp-sai > + - fsl,imx8mq-sai > + - fsl,imx8qm-sai > + - fsl,imx8mm-sai > + - fsl,imx8mn-sai > + - fsl,imx8mp-sai > + - fsl,imx8ulp-sai > + > + reg: > + maxItems: 1 > + > + interrupts: > + items: > + - description: receive and transmit interrupt > + > + dmas: > + minItems: 2 No need for minItems. > + maxItems: 2 > + description: > + Must contain a list of pairs of references to DMA specifiers, one for > + transmission, and one for reception. Skip description and instead describe items like you did for interrupts. > + > + dma-names: > + minItems: 2 > + maxItems: 2 > + items: > + enum: > + - tx > + - rx No, this has to be strictly defined, so items with tx and rx (or reversed order). > + > + clocks: > + minItems: 4 > + items: > + - description: The ipg clock for register access > + - description: master clock source 0 (obsoleted, compatible for old dts) > + - description: master clock source 1 > + - description: master clock source 2 > + - description: master clock source 3 > + - description: PLL clock source for 8kHz series > + - description: PLL clock source for 11kHz series > + > + clock-names: > + minItems: 4 > + maxItems: 7 > + items: > + enum: > + - bus > + - mclk0 > + - mclk1 > + - mclk2 > + - mclk3 > + - pll8k > + - pll11k Ditto. minItems:4 could stay, but the rest is not correct. This has to be strictly ordered/defined list. > + > + lsb-first: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Configures whether the LSB or the MSB is transmitted > + first for the fifo data. If this property is absent, > + the MSB is transmitted first as default, or the LSB > + is transmitted first. > + > + big-endian: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Boolean property, required if all the SAI > + registers are big-endian rather than little-endian. > + > + fsl,sai-synchronous-rx: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. Skip such description, it's useless... Further as well. If present, indicating > + that SAI will work in the synchronous mode (sync Tx > + with Rx) which means both the transmitter and the > + receiver will send and receive data by following > + receiver's bit clocks and frame sync clocks. > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > + > + fsl,sai-asynchronous: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, indicating > + that SAI will work in the asynchronous mode, which > + means both transmitter and receiver will send and > + receive data by following their own bit clocks and > + frame sync clocks separately. > + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the > + default synchronous mode (sync Rx with Tx) will be used, which means both > + transmitter and receiver will send and receive data by following clocks > + of transmitter. > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > + > + fsl,dataline: > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > + description: | > + configure the dataline. it has 3 value for each configuration > + first one means the type: I2S(1) or PDM(2) > + second one is dataline mask for 'rx' > + third one is dataline mask for 'tx'. > + for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; > + it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type > + rx mask is 0xff, tx mask is 0x11 (dataline 1 and 5 enabled). > + > + fsl,sai-mclk-direction-output: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, > + indicates that SAI will output the SAI MCLK clock. > + > + fsl,shared-interrupt: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, > + indicates that interrupt is shared with other modules. > + > + "#sound-dai-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - interrupts > + - dmas > + - dma-names > + - clocks > + - clock-names You need to express the exclusiveness of properties. allOf:if:required:then:... would work, like here: https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml#L155 Best regards, Krzysztof
On Mon, Jul 25, 2022 at 05:31:07PM +0800, Shengjiu Wang wrote: > Convert the NXP SAI binding to DT schema format using json-schema. > > The Synchronous Audio Interface (SAI) provides an interface that > supports full-duplex serial interfaces with frame synchronization > formats such as I2S, AC97, TDM, and codec/DSP interfaces. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > --- > .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ > .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- > 2 files changed, 175 insertions(+), 95 deletions(-) > create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml > delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt > > diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > new file mode 100644 > index 000000000000..adcd77531eba > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > @@ -0,0 +1,175 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale Synchronous Audio Interface (SAI). > + > +maintainers: > + - Shengjiu Wang <shengjiu.wang@nxp.com> > + > +description: | > + The SAI is based on I2S module that used communicating with audio codecs, > + which provides a synchronous audio interface that supports fullduplex > + serial interfaces with frame synchronization such as I2S, AC97, TDM, and > + codec/DSP interfaces. > + > +properties: > + compatible: > + minItems: 1 > + maxItems: 2 > + items: > + enum: > + - fsl,vf610-sai > + - fsl,imx6sx-sai > + - fsl,imx6ul-sai > + - fsl,imx7ulp-sai > + - fsl,imx8mq-sai > + - fsl,imx8qm-sai > + - fsl,imx8mm-sai > + - fsl,imx8mn-sai > + - fsl,imx8mp-sai > + - fsl,imx8ulp-sai You need to define the order and combinations which are valid. > + > + reg: > + maxItems: 1 > + > + interrupts: > + items: > + - description: receive and transmit interrupt > + > + dmas: > + minItems: 2 > + maxItems: 2 > + description: > + Must contain a list of pairs of references to DMA specifiers, one for > + transmission, and one for reception. No need for generic descriptions. > + > + dma-names: > + minItems: 2 > + maxItems: 2 > + items: > + enum: > + - tx > + - rx We really need to support either order? > + > + clocks: > + minItems: 4 > + items: > + - description: The ipg clock for register access > + - description: master clock source 0 (obsoleted, compatible for old dts) > + - description: master clock source 1 > + - description: master clock source 2 > + - description: master clock source 3 > + - description: PLL clock source for 8kHz series > + - description: PLL clock source for 11kHz series > + > + clock-names: > + minItems: 4 > + maxItems: 7 > + items: > + enum: > + - bus > + - mclk0 > + - mclk1 > + - mclk2 > + - mclk3 > + - pll8k > + - pll11k Again, need to define the order. > + > + lsb-first: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + Configures whether the LSB or the MSB is transmitted > + first for the fifo data. If this property is absent, > + the MSB is transmitted first as default, or the LSB > + is transmitted first. > + > + big-endian: > + $ref: /schemas/types.yaml#/definitions/flag Common property, already has a type and description. > + description: | > + Boolean property, required if all the SAI > + registers are big-endian rather than little-endian. > + > + fsl,sai-synchronous-rx: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, indicating > + that SAI will work in the synchronous mode (sync Tx > + with Rx) which means both the transmitter and the > + receiver will send and receive data by following > + receiver's bit clocks and frame sync clocks. > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > + > + fsl,sai-asynchronous: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, indicating Schema already says it is boolean property, don't need that in plain text. > + that SAI will work in the asynchronous mode, which > + means both transmitter and receiver will send and > + receive data by following their own bit clocks and > + frame sync clocks separately. > + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the > + default synchronous mode (sync Rx with Tx) will be used, which means both > + transmitter and receiver will send and receive data by following clocks > + of transmitter. > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > + > + fsl,dataline: > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > + description: | > + configure the dataline. it has 3 value for each configuration > + first one means the type: I2S(1) or PDM(2) Looks like constraints: items: items: - description: ... enum: [ 1, 2 ] - ... - ... > + second one is dataline mask for 'rx' > + third one is dataline mask for 'tx'. > + for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; Perhaps add to the actual example. > + it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type > + rx mask is 0xff, tx mask is 0x11 (dataline 1 and 5 enabled). > + > + fsl,sai-mclk-direction-output: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, > + indicates that SAI will output the SAI MCLK clock. > + > + fsl,shared-interrupt: > + $ref: /schemas/types.yaml#/definitions/flag > + description: | > + This is a boolean property. If present, > + indicates that interrupt is shared with other modules. > + > + "#sound-dai-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - interrupts > + - dmas > + - dma-names > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/vf610-clock.h> > + sai2: sai@40031000 { > + compatible = "fsl,vf610-sai"; > + reg = <0x40031000 0x1000>; > + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sai2_1>; > + clocks = <&clks VF610_CLK_PLATFORM_BUS>, > + <&clks VF610_CLK_SAI2>, > + <&clks 0>, <&clks 0>; > + clock-names = "bus", "mclk1", "mclk2", "mclk3"; > + dma-names = "rx", "tx"; > + dmas = <&edma0 0 20>, > + <&edma0 0 21>; > + big-endian; > + lsb-first; > + };
On Tue, Jul 26, 2022 at 4:25 AM Rob Herring <robh@kernel.org> wrote: > On Mon, Jul 25, 2022 at 05:31:07PM +0800, Shengjiu Wang wrote: > > Convert the NXP SAI binding to DT schema format using json-schema. > > > > The Synchronous Audio Interface (SAI) provides an interface that > > supports full-duplex serial interfaces with frame synchronization > > formats such as I2S, AC97, TDM, and codec/DSP interfaces. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > --- > > .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ > > .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- > > 2 files changed, 175 insertions(+), 95 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml > > delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml > b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > new file mode 100644 > > index 000000000000..adcd77531eba > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > @@ -0,0 +1,175 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Freescale Synchronous Audio Interface (SAI). > > + > > +maintainers: > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > + > > +description: | > > + The SAI is based on I2S module that used communicating with audio > codecs, > > + which provides a synchronous audio interface that supports fullduplex > > + serial interfaces with frame synchronization such as I2S, AC97, TDM, > and > > + codec/DSP interfaces. > > + > > +properties: > > + compatible: > > + minItems: 1 > > + maxItems: 2 > > + items: > > + enum: > > + - fsl,vf610-sai > > + - fsl,imx6sx-sai > > + - fsl,imx6ul-sai > > + - fsl,imx7ulp-sai > > + - fsl,imx8mq-sai > > + - fsl,imx8qm-sai > > + - fsl,imx8mm-sai > > + - fsl,imx8mn-sai > > + - fsl,imx8mp-sai > > + - fsl,imx8ulp-sai > > You need to define the order and combinations which are valid. > ok, I will modify it. > > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: receive and transmit interrupt > > + > > + dmas: > > + minItems: 2 > > + maxItems: 2 > > + description: > > + Must contain a list of pairs of references to DMA specifiers, one > for > > + transmission, and one for reception. > > No need for generic descriptions. > ok, will remove the description. > > > + > > + dma-names: > > + minItems: 2 > > + maxItems: 2 > > + items: > > + enum: > > + - tx > > + - rx > > We really need to support either order? > yes, some dts use "tx", "rx", some dts use "rx", "tx". legacy issue. > > > + > > + clocks: > > + minItems: 4 > > + items: > > + - description: The ipg clock for register access > > + - description: master clock source 0 (obsoleted, compatible for > old dts) > > + - description: master clock source 1 > > + - description: master clock source 2 > > + - description: master clock source 3 > > + - description: PLL clock source for 8kHz series > > + - description: PLL clock source for 11kHz series > > + > > + clock-names: > > + minItems: 4 > > + maxItems: 7 > > + items: > > + enum: > > + - bus > > + - mclk0 > > + - mclk1 > > + - mclk2 > > + - mclk3 > > + - pll8k > > + - pll11k > > Again, need to define the order. > some dts already add "mclk0", but some dts no "mclk0". Is there a way to handle this? > > > + > > + lsb-first: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + Configures whether the LSB or the MSB is transmitted > > + first for the fifo data. If this property is absent, > > + the MSB is transmitted first as default, or the LSB > > + is transmitted first. > > + > > + big-endian: > > + $ref: /schemas/types.yaml#/definitions/flag > > Common property, already has a type and description. > ok, will remove this $ref. > > > + description: | > > + Boolean property, required if all the SAI > > + registers are big-endian rather than little-endian. > > + > > + fsl,sai-synchronous-rx: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, indicating > > + that SAI will work in the synchronous mode (sync Tx > > + with Rx) which means both the transmitter and the > > + receiver will send and receive data by following > > + receiver's bit clocks and frame sync clocks. > > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > > + > > + fsl,sai-asynchronous: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, indicating > > Schema already says it is boolean property, don't need that in plain > text. > ok, will update > > > + that SAI will work in the asynchronous mode, which > > + means both transmitter and receiver will send and > > + receive data by following their own bit clocks and > > + frame sync clocks separately. > > + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are > absent, the > > + default synchronous mode (sync Rx with Tx) will be used, which > means both > > + transmitter and receiver will send and receive data by following > clocks > > + of transmitter. > > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > > + > > + fsl,dataline: > > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > > + description: | > > + configure the dataline. it has 3 value for each configuration > > + first one means the type: I2S(1) or PDM(2) > > Looks like constraints: > > items: > items: > - description: ... > enum: [ 1, 2 ] > - ... > - ... > > ok, I will add it. > > + second one is dataline mask for 'rx' > > + third one is dataline mask for 'tx'. > > + for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; > > Perhaps add to the actual example. > ok. best regards wang shengjiu > > > + it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type > > + rx mask is 0xff, tx mask is 0x11 (dataline 1 and 5 enabled). > > + > > + fsl,sai-mclk-direction-output: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, > > + indicates that SAI will output the SAI MCLK clock. > > + > > + fsl,shared-interrupt: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, > > + indicates that interrupt is shared with other modules. > > + > > + "#sound-dai-cells": > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - dmas > > + - dma-names > > + - clocks > > + - clock-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/clock/vf610-clock.h> > > + sai2: sai@40031000 { > > + compatible = "fsl,vf610-sai"; > > + reg = <0x40031000 0x1000>; > > + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_sai2_1>; > > + clocks = <&clks VF610_CLK_PLATFORM_BUS>, > > + <&clks VF610_CLK_SAI2>, > > + <&clks 0>, <&clks 0>; > > + clock-names = "bus", "mclk1", "mclk2", "mclk3"; > > + dma-names = "rx", "tx"; > > + dmas = <&edma0 0 20>, > > + <&edma0 0 21>; > > + big-endian; > > + lsb-first; > > + }; >
On Tue, Jul 26, 2022 at 4:05 AM Krzysztof Kozlowski < krzysztof.kozlowski@linaro.org> wrote: > On 25/07/2022 11:31, Shengjiu Wang wrote: > > Convert the NXP SAI binding to DT schema format using json-schema. > > > > The Synchronous Audio Interface (SAI) provides an interface that > > supports full-duplex serial interfaces with frame synchronization > > formats such as I2S, AC97, TDM, and codec/DSP interfaces. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > --- > > .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ > > .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- > > 2 files changed, 175 insertions(+), 95 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml > > delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml > b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > new file mode 100644 > > index 000000000000..adcd77531eba > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > @@ -0,0 +1,175 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Freescale Synchronous Audio Interface (SAI). > > + > > +maintainers: > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > + > > +description: | > > + The SAI is based on I2S module that used communicating with audio > codecs, > > + which provides a synchronous audio interface that supports fullduplex > > + serial interfaces with frame synchronization such as I2S, AC97, TDM, > and > > + codec/DSP interfaces. > > + > > +properties: > > + compatible: > > + minItems: 1 > > + maxItems: 2 > > You allow anything here, so it's not acceptable. This has to be strictly > defined. > ok, I will update it. > > > + items: > > + enum: > > + - fsl,vf610-sai > > + - fsl,imx6sx-sai > > + - fsl,imx6ul-sai > > + - fsl,imx7ulp-sai > > + - fsl,imx8mq-sai > > + - fsl,imx8qm-sai > > + - fsl,imx8mm-sai > > + - fsl,imx8mn-sai > > + - fsl,imx8mp-sai > > + - fsl,imx8ulp-sai > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: receive and transmit interrupt > > + > > + dmas: > > + minItems: 2 > > No need for minItems. > ok > > > + maxItems: 2 > > + description: > > + Must contain a list of pairs of references to DMA specifiers, one > for > > + transmission, and one for reception. > > Skip description and instead describe items like you did for interrupts. > ok, will update it > > > + > > + dma-names: > > + minItems: 2 > > + maxItems: 2 > > + items: > > + enum: > > + - tx > > + - rx > > No, this has to be strictly defined, so items with tx and rx (or > reversed order). > two kind of order is needed, seems I need to use if - then -else > > > + > > + clocks: > > + minItems: 4 > > + items: > > + - description: The ipg clock for register access > > + - description: master clock source 0 (obsoleted, compatible for > old dts) > > + - description: master clock source 1 > > + - description: master clock source 2 > > + - description: master clock source 3 > > + - description: PLL clock source for 8kHz series > > + - description: PLL clock source for 11kHz series > > + > > + clock-names: > > + minItems: 4 > > + maxItems: 7 > > + items: > > + enum: > > + - bus > > + - mclk0 > > + - mclk1 > > + - mclk2 > > + - mclk3 > > + - pll8k > > + - pll11k > > Ditto. minItems:4 could stay, but the rest is not correct. This has to > be strictly ordered/defined list. > ok, I will update it, also I need two orders. > > > + > > + lsb-first: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + Configures whether the LSB or the MSB is transmitted > > + first for the fifo data. If this property is absent, > > + the MSB is transmitted first as default, or the LSB > > + is transmitted first. > > + > > + big-endian: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + Boolean property, required if all the SAI > > + registers are big-endian rather than little-endian. > > + > > + fsl,sai-synchronous-rx: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. > > Skip such description, it's useless... Further as well. > > If present, indicating > > + that SAI will work in the synchronous mode (sync Tx > > + with Rx) which means both the transmitter and the > > + receiver will send and receive data by following > > + receiver's bit clocks and frame sync clocks. > > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > > + > > + fsl,sai-asynchronous: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, indicating > > + that SAI will work in the asynchronous mode, which > > + means both transmitter and receiver will send and > > + receive data by following their own bit clocks and > > + frame sync clocks separately. > > + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are > absent, the > > + default synchronous mode (sync Rx with Tx) will be used, which > means both > > + transmitter and receiver will send and receive data by following > clocks > > + of transmitter. > > + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. > > + > > + fsl,dataline: > > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > > + description: | > > + configure the dataline. it has 3 value for each configuration > > + first one means the type: I2S(1) or PDM(2) > > + second one is dataline mask for 'rx' > > + third one is dataline mask for 'tx'. > > + for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; > > + it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type > > + rx mask is 0xff, tx mask is 0x11 (dataline 1 and 5 enabled). > > + > > + fsl,sai-mclk-direction-output: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, > > + indicates that SAI will output the SAI MCLK clock. > > + > > + fsl,shared-interrupt: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: | > > + This is a boolean property. If present, > > + indicates that interrupt is shared with other modules. > > + > > + "#sound-dai-cells": > > + const: 0 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - dmas > > + - dma-names > > + - clocks > > + - clock-names > > You need to express the exclusiveness of properties. > allOf:if:required:then:... would work, like here: > > https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml#L155 > > Yes, that is I wanted best regards wang shengjiu > > Best regards, > Krzysztof >
On Thu, Jul 28, 2022 at 11:01:16PM +0800, Shengjiu Wang wrote: > On Tue, Jul 26, 2022 at 4:05 AM Krzysztof Kozlowski < > krzysztof.kozlowski@linaro.org> wrote: > > > On 25/07/2022 11:31, Shengjiu Wang wrote: > > > Convert the NXP SAI binding to DT schema format using json-schema. > > > > > > The Synchronous Audio Interface (SAI) provides an interface that > > > supports full-duplex serial interfaces with frame synchronization > > > formats such as I2S, AC97, TDM, and codec/DSP interfaces. > > > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > > --- > > > .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ > > > .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- > > > 2 files changed, 175 insertions(+), 95 deletions(-) > > > create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml > > > delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt > > > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > > new file mode 100644 > > > index 000000000000..adcd77531eba > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml > > > @@ -0,0 +1,175 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Freescale Synchronous Audio Interface (SAI). > > > + > > > +maintainers: > > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > > + > > > +description: | > > > + The SAI is based on I2S module that used communicating with audio > > codecs, > > > + which provides a synchronous audio interface that supports fullduplex > > > + serial interfaces with frame synchronization such as I2S, AC97, TDM, > > and > > > + codec/DSP interfaces. > > > + > > > +properties: > > > + compatible: > > > + minItems: 1 > > > + maxItems: 2 > > > > You allow anything here, so it's not acceptable. This has to be strictly > > defined. > > > > ok, I will update it. > > > > > > + items: > > > + enum: > > > + - fsl,vf610-sai > > > + - fsl,imx6sx-sai > > > + - fsl,imx6ul-sai > > > + - fsl,imx7ulp-sai > > > + - fsl,imx8mq-sai > > > + - fsl,imx8qm-sai > > > + - fsl,imx8mm-sai > > > + - fsl,imx8mn-sai > > > + - fsl,imx8mp-sai > > > + - fsl,imx8ulp-sai > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + interrupts: > > > + items: > > > + - description: receive and transmit interrupt > > > + > > > + dmas: > > > + minItems: 2 > > > > No need for minItems. > > > > ok > > > > > > > + maxItems: 2 > > > + description: > > > + Must contain a list of pairs of references to DMA specifiers, one > > for > > > + transmission, and one for reception. > > > > Skip description and instead describe items like you did for interrupts. > > > > ok, will update it > > > > > > + > > > + dma-names: > > > + minItems: 2 > > > + maxItems: 2 > > > + items: > > > + enum: > > > + - tx > > > + - rx > > > > No, this has to be strictly defined, so items with tx and rx (or > > reversed order). > > > > two kind of order is needed, seems I need to use > if - then -else No, pick the more common one for the schema and fix the dts files for the less common case. Rob
diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml new file mode 100644 index 000000000000..adcd77531eba --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml @@ -0,0 +1,175 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,sai.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Synchronous Audio Interface (SAI). + +maintainers: + - Shengjiu Wang <shengjiu.wang@nxp.com> + +description: | + The SAI is based on I2S module that used communicating with audio codecs, + which provides a synchronous audio interface that supports fullduplex + serial interfaces with frame synchronization such as I2S, AC97, TDM, and + codec/DSP interfaces. + +properties: + compatible: + minItems: 1 + maxItems: 2 + items: + enum: + - fsl,vf610-sai + - fsl,imx6sx-sai + - fsl,imx6ul-sai + - fsl,imx7ulp-sai + - fsl,imx8mq-sai + - fsl,imx8qm-sai + - fsl,imx8mm-sai + - fsl,imx8mn-sai + - fsl,imx8mp-sai + - fsl,imx8ulp-sai + + reg: + maxItems: 1 + + interrupts: + items: + - description: receive and transmit interrupt + + dmas: + minItems: 2 + maxItems: 2 + description: + Must contain a list of pairs of references to DMA specifiers, one for + transmission, and one for reception. + + dma-names: + minItems: 2 + maxItems: 2 + items: + enum: + - tx + - rx + + clocks: + minItems: 4 + items: + - description: The ipg clock for register access + - description: master clock source 0 (obsoleted, compatible for old dts) + - description: master clock source 1 + - description: master clock source 2 + - description: master clock source 3 + - description: PLL clock source for 8kHz series + - description: PLL clock source for 11kHz series + + clock-names: + minItems: 4 + maxItems: 7 + items: + enum: + - bus + - mclk0 + - mclk1 + - mclk2 + - mclk3 + - pll8k + - pll11k + + lsb-first: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Configures whether the LSB or the MSB is transmitted + first for the fifo data. If this property is absent, + the MSB is transmitted first as default, or the LSB + is transmitted first. + + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Boolean property, required if all the SAI + registers are big-endian rather than little-endian. + + fsl,sai-synchronous-rx: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This is a boolean property. If present, indicating + that SAI will work in the synchronous mode (sync Tx + with Rx) which means both the transmitter and the + receiver will send and receive data by following + receiver's bit clocks and frame sync clocks. + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. + + fsl,sai-asynchronous: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This is a boolean property. If present, indicating + that SAI will work in the asynchronous mode, which + means both transmitter and receiver will send and + receive data by following their own bit clocks and + frame sync clocks separately. + If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the + default synchronous mode (sync Rx with Tx) will be used, which means both + transmitter and receiver will send and receive data by following clocks + of transmitter. + fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. + + fsl,dataline: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: | + configure the dataline. it has 3 value for each configuration + first one means the type: I2S(1) or PDM(2) + second one is dataline mask for 'rx' + third one is dataline mask for 'tx'. + for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; + it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type + rx mask is 0xff, tx mask is 0x11 (dataline 1 and 5 enabled). + + fsl,sai-mclk-direction-output: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This is a boolean property. If present, + indicates that SAI will output the SAI MCLK clock. + + fsl,shared-interrupt: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This is a boolean property. If present, + indicates that interrupt is shared with other modules. + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/vf610-clock.h> + sai2: sai@40031000 { + compatible = "fsl,vf610-sai"; + reg = <0x40031000 0x1000>; + interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2_1>; + clocks = <&clks VF610_CLK_PLATFORM_BUS>, + <&clks VF610_CLK_SAI2>, + <&clks 0>, <&clks 0>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dma-names = "rx", "tx"; + dmas = <&edma0 0 20>, + <&edma0 0 21>; + big-endian; + lsb-first; + }; diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt deleted file mode 100644 index fbdefc3fade7..000000000000 --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt +++ /dev/null @@ -1,95 +0,0 @@ -Freescale Synchronous Audio Interface (SAI). - -The SAI is based on I2S module that used communicating with audio codecs, -which provides a synchronous audio interface that supports fullduplex -serial interfaces with frame synchronization such as I2S, AC97, TDM, and -codec/DSP interfaces. - -Required properties: - - - compatible : Compatible list, contains "fsl,vf610-sai", - "fsl,imx6sx-sai", "fsl,imx6ul-sai", - "fsl,imx7ulp-sai", "fsl,imx8mq-sai", - "fsl,imx8qm-sai", "fsl,imx8mm-sai", - "fsl,imx8mn-sai", "fsl,imx8mp-sai", or - "fsl,imx8ulp-sai". - - - reg : Offset and length of the register set for the device. - - - clocks : Must contain an entry for each entry in clock-names. - - - clock-names : Must include the "bus" for register access and - "mclk1", "mclk2", "mclk3" for bit clock and frame - clock providing. - "pll8k", "pll11k" are optional, they are the clock - source for root clock, one is for 8kHz series rates - another one is for 11kHz series rates. - - dmas : Generic dma devicetree binding as described in - Documentation/devicetree/bindings/dma/dma.txt. - - - dma-names : Two dmas have to be defined, "tx" and "rx". - - - pinctrl-names : Must contain a "default" entry. - - - pinctrl-NNN : One property must exist for each entry in - pinctrl-names. See ../pinctrl/pinctrl-bindings.txt - for details of the property values. - - - lsb-first : Configures whether the LSB or the MSB is transmitted - first for the fifo data. If this property is absent, - the MSB is transmitted first as default, or the LSB - is transmitted first. - - - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating - that SAI will work in the synchronous mode (sync Tx - with Rx) which means both the transmitter and the - receiver will send and receive data by following - receiver's bit clocks and frame sync clocks. - - - fsl,sai-asynchronous: This is a boolean property. If present, indicating - that SAI will work in the asynchronous mode, which - means both transmitter and receiver will send and - receive data by following their own bit clocks and - frame sync clocks separately. - - - fsl,dataline : configure the dataline. it has 3 value for each configuration - first one means the type: I2S(1) or PDM(2) - second one is dataline mask for 'rx' - third one is dataline mask for 'tx'. - for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>; - it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type - rx mask is 0xff, tx mask is 0x11 (dataline 1 and 4 enabled). - -Optional properties: - - - big-endian : Boolean property, required if all the SAI - registers are big-endian rather than little-endian. - -Optional properties (for mx6ul): - - - fsl,sai-mclk-direction-output: This is a boolean property. If present, - indicates that SAI will output the SAI MCLK clock. - -Note: -- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the - default synchronous mode (sync Rx with Tx) will be used, which means both - transmitter and receiver will send and receive data by following clocks - of transmitter. -- fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. - -Example: -sai2: sai@40031000 { - compatible = "fsl,vf610-sai"; - reg = <0x40031000 0x1000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai2_1>; - clocks = <&clks VF610_CLK_PLATFORM_BUS>, - <&clks VF610_CLK_SAI2>, - <&clks 0>, <&clks 0>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, - <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; - big-endian; - lsb-first; -};
Convert the NXP SAI binding to DT schema format using json-schema. The Synchronous Audio Interface (SAI) provides an interface that supports full-duplex serial interfaces with frame synchronization formats such as I2S, AC97, TDM, and codec/DSP interfaces. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> --- .../devicetree/bindings/sound/fsl,sai.yaml | 175 ++++++++++++++++++ .../devicetree/bindings/sound/fsl-sai.txt | 95 ---------- 2 files changed, 175 insertions(+), 95 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/fsl,sai.yaml delete mode 100644 Documentation/devicetree/bindings/sound/fsl-sai.txt