From patchwork Tue May 21 10:13:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13669239 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F4616EB6E; Tue, 21 May 2024 10:34:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716287657; cv=none; b=gOKxhJ1SGdeO9Gx8pa1jgAbJunveTWZ4AEe8Z3HfkEfZTVBEZ6RnNnVhvtl+rWjpW7IzKlZmlLHBt+Xmv0ZyOUoRuLsra30eVjvR7eHOla4jg4hAVStoYP+qjUmV6f4OkYHKJ2rCz2fV1lXywFg2Y+sbwodAcv1odIa7vEKNLDs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716287657; c=relaxed/simple; bh=Sp/7Txf6djQgFui6IajQOXTl4EvU56xHjCMGKqvCCSA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References; b=jI5h6w+1IWXhsZRIxxgGvfd883wffgTKgLG+FSV9xMNFaxs5JvtmV6wyTeZJcxHjBZtxsp7wJ5HE06OXH7V3IdZpyAlRw+UzSALDRogbvbGeAKNfORc0DYo/EuefwMoCerMzxjVE2x5GjPi7oEWIOe1dER9Rcg6Dil9Qhny/mNU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AF2101A09EF; Tue, 21 May 2024 12:34:07 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B4E941A099B; Tue, 21 May 2024 12:34:06 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 10CF81820F77; Tue, 21 May 2024 18:34:02 +0800 (+08) From: Shengjiu Wang To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, shengjiu.wang@gmail.com, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v3 1/2] ASoC: dt-bindings: fsl,xcvr: Add compatible string for i.MX95 Date: Tue, 21 May 2024 18:13:35 +0800 Message-Id: <1716286416-17621-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1716286416-17621-1-git-send-email-shengjiu.wang@nxp.com> References: <1716286416-17621-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add compatible string "fsl,imx95-xcvr" for i.MX95 platform. The difference between each platform is in below table. +---------+--------+----------+--------+ | SOC | PHY | eARC/ARC | SPDIF | +---------+--------+----------+--------+ | i.MX8MP | V1 | Yes | Yes | +---------+--------+----------+--------+ | i.MX93 | N/A | N/A | Yes | +---------+--------+----------+--------+ | i.MX95 | V2 | N/A | Yes | +---------+--------+----------+--------+ On i.MX95, there are two PLL clock sources, they are the parent clocks of the XCVR root clock. one is for 8kHz series rates, named as 'pll8k', another one is for 11kHz series rates, named as 'pll11k'. They are optional clocks, if there are such clocks, then the driver can switch between them to support more accurate sample rates. As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4' for clocks and clock-names properties. On i.MX95, the 'interrupts' configuration has the same constraint as i.MX93. Only on i.MX8MP, the 'resets' is required, but for i.MX95 and i.MX93 there is no such hardware setting. Signed-off-by: Shengjiu Wang --- .../devicetree/bindings/sound/fsl,xcvr.yaml | 37 ++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml index 0eb0c1ba8710..d1dcc27655eb 100644 --- a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml @@ -22,6 +22,7 @@ properties: enum: - fsl,imx8mp-xcvr - fsl,imx93-xcvr + - fsl,imx95-xcvr reg: items: @@ -49,6 +50,9 @@ properties: - description: PHY clock - description: SPBA clock - description: PLL clock + - description: PLL clock source for 8kHz series + - description: PLL clock source for 11kHz series + minItems: 4 clock-names: items: @@ -56,6 +60,9 @@ properties: - const: phy - const: spba - const: pll_ipg + - const: pll8k + - const: pll11k + minItems: 4 dmas: items: @@ -79,15 +86,24 @@ required: - clock-names - dmas - dma-names - - resets allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mp-xcvr + then: + required: + - resets + - if: properties: compatible: contains: enum: - fsl,imx93-xcvr + - fsl,imx95-xcvr then: properties: interrupts: @@ -98,6 +114,25 @@ allOf: interrupts: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - fsl,imx95-xcvr + then: + properties: + clocks: + maxItems: 6 + clock-names: + maxItems: 6 + else: + properties: + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + additionalProperties: false examples: