From patchwork Wed Apr 30 10:54:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 4092601 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id C8C309F39D for ; Wed, 30 Apr 2014 10:54:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CA64820263 for ; Wed, 30 Apr 2014 10:54:08 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 750F020222 for ; Wed, 30 Apr 2014 10:54:07 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 4C6842625FD; Wed, 30 Apr 2014 12:54:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id A9DF92619E5; Wed, 30 Apr 2014 12:53:12 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 6AAF0261A22; Wed, 30 Apr 2014 12:53:11 +0200 (CEST) Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2lp0212.outbound.protection.outlook.com [207.46.163.212]) by alsa0.perex.cz (Postfix) with ESMTP id A6F422619E5 for ; Wed, 30 Apr 2014 12:52:37 +0200 (CEST) Received: from BY2PR03CA056.namprd03.prod.outlook.com (10.141.249.29) by BY2PR03MB025.namprd03.prod.outlook.com (10.255.240.39) with Microsoft SMTP Server (TLS) id 15.0.934.12; Wed, 30 Apr 2014 10:52:25 +0000 Received: from BY2FFO11FD058.protection.gbl (2a01:111:f400:7c0c::103) by BY2PR03CA056.outlook.office365.com (2a01:111:e400:2c5d::29) with Microsoft SMTP Server (TLS) id 15.0.929.12 via Frontend Transport; Wed, 30 Apr 2014 10:52:26 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.1) by BY2FFO11FD058.mail.protection.outlook.com (10.1.15.178) with Microsoft SMTP Server (TLS) id 15.0.929.8 via Frontend Transport; Wed, 30 Apr 2014 10:52:26 +0000 Received: from rio.ap.freescale.net (rio.ap.freescale.net [10.192.242.9]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s3UAqHbo006317; Wed, 30 Apr 2014 03:52:23 -0700 From: Nicolin Chen To: Date: Wed, 30 Apr 2014 18:54:06 +0800 Message-ID: <1b18017499e7570126b80cda1a8997aee2609dc5.1398853588.git.Guangyu.Chen@freescale.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: References: X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.1; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(428001)(199002)(189002)(79102001)(77982001)(20776003)(47776003)(89996001)(62966002)(85852003)(80022001)(50466002)(83072002)(74502001)(74662001)(77156001)(87286001)(6806004)(76482001)(92566001)(92726001)(88136002)(19580405001)(77096999)(31966008)(4396001)(36756003)(46102001)(80976001)(19580395003)(83322001)(99396002)(50986999)(76176999)(50226001)(86362001)(48376002)(81542001)(93916002)(87936001)(101416001)(44976005)(81342001); DIR:OUT; SFP:1101; SCL:1; SRVR:BY2PR03MB025; H:tx30smr01.am.freescale.net; FPR:; MLV:sfv; PTR:gate-tx3.freescale.com; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0197AFBD92 Received-SPF: None (: freescale.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 192.88.168.1) smtp.mailfrom=guangyu.chen@freescale.com; X-OriginatorOrg: freescale.com Cc: tiwai@suse.de, alsa-devel@alsa-project.org, lgirdwood@gmail.com Subject: [alsa-devel] [PATCH 2/5] ASoC: fsl_spdif: Rename all _div to _df X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP We should have used _df by following the reference manual at the beginning. So this patch just renames them. Signed-off-by: Nicolin Chen --- sound/soc/fsl/fsl_spdif.c | 41 ++++++++++++++++++++--------------------- sound/soc/fsl/fsl_spdif.h | 12 ++++++------ 2 files changed, 26 insertions(+), 27 deletions(-) diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index ed4bf75..af8bc37 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -75,7 +75,7 @@ struct fsl_spdif_priv { struct platform_device *pdev; struct regmap *regmap; bool dpll_locked; - u8 txclk_div[SPDIF_TXRATE_MAX]; + u8 txclk_df[SPDIF_TXRATE_MAX]; u8 txclk_src[SPDIF_TXRATE_MAX]; u8 rxclk_src; struct clk *txclk[SPDIF_TXRATE_MAX]; @@ -351,7 +351,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, struct platform_device *pdev = spdif_priv->pdev; unsigned long csfs = 0; u32 stc, mask, rate; - u8 clk, div; + u8 clk, txclk_df; int ret; switch (sample_rate) { @@ -378,9 +378,9 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, return -EINVAL; } - div = spdif_priv->txclk_div[rate]; - if (div == 0) { - dev_err(&pdev->dev, "the divisor can't be zero\n"); + txclk_df = spdif_priv->txclk_df[rate]; + if (txclk_df == 0) { + dev_err(&pdev->dev, "the txclk_df can't be zero\n"); return -EINVAL; } @@ -389,11 +389,10 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, goto clk_set_bypass; /* - * The S/PDIF block needs a clock of 64 * fs * div. The S/PDIF block - * will divide by (div). So request 64 * fs * (div+1) which will - * get rounded. + * The S/PDIF block needs a clock of 64 * fs * txclk_df. + * So request 64 * fs * (txclk_df + 1) to get rounded. */ - ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (div + 1)); + ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (txclk_df + 1)); if (ret) { dev_err(&pdev->dev, "failed to set tx clock rate\n"); return ret; @@ -401,7 +400,7 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, clk_set_bypass: dev_dbg(&pdev->dev, "expected clock rate = %d\n", - (64 * sample_rate * div)); + (64 * sample_rate * txclk_df)); dev_dbg(&pdev->dev, "actual clock rate = %ld\n", clk_get_rate(spdif_priv->txclk[rate])); @@ -409,8 +408,8 @@ clk_set_bypass: spdif_set_cstatus(ctrl, IEC958_AES3_CON_FS, csfs); /* select clock source and divisor */ - stc = STC_TXCLK_ALL_EN | STC_TXCLK_SRC_SET(clk) | STC_TXCLK_DIV(div); - mask = STC_TXCLK_ALL_EN_MASK | STC_TXCLK_SRC_MASK | STC_TXCLK_DIV_MASK; + stc = STC_TXCLK_ALL_EN | STC_TXCLK_SRC_SET(clk) | STC_TXCLK_DF(txclk_df); + mask = STC_TXCLK_ALL_EN_MASK | STC_TXCLK_SRC_MASK | STC_TXCLK_DF_MASK; regmap_update_bits(regmap, REG_SPDIF_STC, mask, stc); dev_dbg(&pdev->dev, "set sample rate to %d\n", sample_rate); @@ -1020,22 +1019,22 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, { const u32 rate[] = { 32000, 44100, 48000 }; u64 rate_ideal, rate_actual, sub; - u32 div, arate; + u32 txclk_df, arate; - for (div = 1; div <= 128; div++) { - rate_ideal = rate[index] * (div + 1) * 64; + for (txclk_df = 1; txclk_df <= 128; txclk_df++) { + rate_ideal = rate[index] * (txclk_df + 1) * 64; if (round) rate_actual = clk_round_rate(clk, rate_ideal); else rate_actual = clk_get_rate(clk); arate = rate_actual / 64; - arate /= div; + arate /= txclk_df; if (arate == rate[index]) { /* We are lucky */ savesub = 0; - spdif_priv->txclk_div[index] = div; + spdif_priv->txclk_df[index] = txclk_df; break; } else if (arate / rate[index] == 1) { /* A little bigger than expect */ @@ -1043,7 +1042,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, do_div(sub, rate[index]); if (sub < savesub) { savesub = sub; - spdif_priv->txclk_div[index] = div; + spdif_priv->txclk_df[index] = txclk_df; } } else if (rate[index] / arate == 1) { /* A little smaller than expect */ @@ -1051,7 +1050,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, do_div(sub, rate[index]); if (sub < savesub) { savesub = sub; - spdif_priv->txclk_div[index] = div; + spdif_priv->txclk_df[index] = txclk_df; } } } @@ -1096,8 +1095,8 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv, dev_dbg(&pdev->dev, "use rxtx%d as tx clock source for %dHz sample rate\n", spdif_priv->txclk_src[index], rate[index]); - dev_dbg(&pdev->dev, "use divisor %d for %dHz sample rate\n", - spdif_priv->txclk_div[index], rate[index]); + dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n", + spdif_priv->txclk_df[index], rate[index]); return 0; } diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h index 4ec27fc..16fde4b 100644 --- a/sound/soc/fsl/fsl_spdif.h +++ b/sound/soc/fsl/fsl_spdif.h @@ -143,18 +143,18 @@ enum spdif_gainsel { #define INT_RXFIFO_FUL (1 << 0) /* SPDIF Clock register */ -#define STC_SYSCLK_DIV_OFFSET 11 -#define STC_SYSCLK_DIV_MASK (0x1ff << STC_SYSCLK_DIV_OFFSET) -#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK) +#define STC_SYSCLK_DF_OFFSET 11 +#define STC_SYSCLK_DF_MASK (0x1ff << STC_SYSCLK_DF_OFFSET) +#define STC_SYSCLK_DF(x) ((((x) - 1) << STC_SYSCLK_DF_OFFSET) & STC_SYSCLK_DF_MASK) #define STC_TXCLK_SRC_OFFSET 8 #define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET) #define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK) #define STC_TXCLK_ALL_EN_OFFSET 7 #define STC_TXCLK_ALL_EN_MASK (1 << STC_TXCLK_ALL_EN_OFFSET) #define STC_TXCLK_ALL_EN (1 << STC_TXCLK_ALL_EN_OFFSET) -#define STC_TXCLK_DIV_OFFSET 0 -#define STC_TXCLK_DIV_MASK (0x7ff << STC_TXCLK_DIV_OFFSET) -#define STC_TXCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_TXCLK_DIV_MASK) +#define STC_TXCLK_DF_OFFSET 0 +#define STC_TXCLK_DF_MASK (0x7ff << STC_TXCLK_DF_OFFSET) +#define STC_TXCLK_DF(x) ((((x) - 1) << STC_TXCLK_DF_OFFSET) & STC_TXCLK_DF_MASK) #define STC_TXCLK_SRC_MAX 8 #define STC_TXCLK_SPDIF_ROOT 1