From patchwork Sat Feb 25 12:30:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 9591675 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 723E66042B for ; Sat, 25 Feb 2017 12:32:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5BC5D285C2 for ; Sat, 25 Feb 2017 12:32:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D4AB285B0; Sat, 25 Feb 2017 12:32:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,T_DKIM_INVALID autolearn=no version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A30C7285B0 for ; Sat, 25 Feb 2017 12:32:56 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 90E61267107; Sat, 25 Feb 2017 13:32:45 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 9765F267145; Sat, 25 Feb 2017 13:32:44 +0100 (CET) Received: from forward7p.cmail.yandex.net (forward7p.cmail.yandex.net [87.250.241.192]) by alsa0.perex.cz (Postfix) with ESMTP id B861726713F for ; Sat, 25 Feb 2017 13:32:18 +0100 (CET) Received: from smtp2h.mail.yandex.net (smtp2h.mail.yandex.net [IPv6:2a02:6b8:0:f05::116]) by forward7p.cmail.yandex.net (Yandex) with ESMTP id 3B9E221676; Sat, 25 Feb 2017 15:32:17 +0300 (MSK) Received: from smtp2h.mail.yandex.net (localhost.localdomain [127.0.0.1]) by smtp2h.mail.yandex.net (Yandex) with ESMTP id C11897810F9; Sat, 25 Feb 2017 15:32:10 +0300 (MSK) Received: by smtp2h.mail.yandex.net (nwsmtp/Yandex) with ESMTPSA id deZybVKnde-W3dqBmqE; Sat, 25 Feb 2017 15:32:09 +0300 (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client certificate not present) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.xyz; s=mail; t=1488025930; bh=UxTYQtPVZ8i76ZGxuUEWgkCaMrv6m14fIXNvpnLC8Eo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=Nzhm1iJitbe0+WRMeYw6cd/zjHpDWF298vwxJTT/8YEKiTW1yBMj59qsk5WozfdZU hDe1Few8xUkJKBuE94dgeKlZin1xHvIMwXthjnEvbFhhuKFOyIy9yJSdjrWvFuH78l l2ElmW6us4Qnww3BC10S4+ji17NtHEUtTwIh/AKo= Authentication-Results: smtp2h.mail.yandex.net; dkim=pass header.i=@aosc.xyz X-Yandex-ForeignMX: US X-Yandex-Suid-Status: 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 1130000036118848 From: Icenowy Zheng To: Vinod Koul , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Mark Brown Date: Sat, 25 Feb 2017 20:30:25 +0800 Message-Id: <20170225123029.55939-5-icenowy@aosc.xyz> X-Mailer: git-send-email 2.11.1 In-Reply-To: <20170225123029.55939-1-icenowy@aosc.xyz> References: <20170225123029.55939-1-icenowy@aosc.xyz> Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Icenowy Zheng , dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH 5/9] dmaengine: sun6i: support V3s SoC variant X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner V3s has a DMA engine similar to the ones from A31, but with fewer channels and DRQs. Add support for it. As it also needs the special gate bit, make the gate bit generic. According to BSP source code, SUN8IW6 (A83T) also needs the bit, so it have also been specified gate_needed property. Signed-off-by: Icenowy Zheng --- Documentation/devicetree/bindings/dma/sun6i-dma.txt | 1 + drivers/dma/sun6i-dma.c | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index 6b267045f522..98fbe1a5c6dd 100644 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt @@ -9,6 +9,7 @@ Required properties: "allwinner,sun8i-a23-dma" "allwinner,sun8i-a83t-dma" "allwinner,sun8i-h3-dma" + "allwinner,sun8i-v3s-dma" - reg: Should contain the registers base address and length - interrupts: Should contain a reference to the interrupt used by this device - clocks: Should contain a reference to the parent AHB clock diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index a2358780ab2c..1f38424c1b14 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -101,6 +101,7 @@ struct sun6i_dma_config { u32 nr_max_channels; u32 nr_max_requests; u32 nr_max_vchans; + bool gate_needed; }; /* @@ -1009,12 +1010,14 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = { .nr_max_channels = 8, .nr_max_requests = 24, .nr_max_vchans = 37, + .gate_needed = true, }; static struct sun6i_dma_config sun8i_a83t_dma_cfg = { .nr_max_channels = 8, .nr_max_requests = 28, .nr_max_vchans = 39, + .gate_needed = true, }; /* @@ -1028,11 +1031,19 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { .nr_max_vchans = 34, }; +static struct sun6i_dma_config sun8i_v3s_dma_cfg = { + .nr_max_channels = 8, + .nr_max_requests = 23, + .nr_max_vchans = 24, + .gate_needed = true, +}; + static const struct of_device_id sun6i_dma_match[] = { { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg }, { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg }, { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg }, { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg }, + { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sun6i_dma_match); @@ -1177,10 +1188,10 @@ static int sun6i_dma_probe(struct platform_device *pdev) /* * sun8i variant requires us to toggle a dma gating register, * as seen in Allwinner's SDK. This register is not documented - * in the A23 user manual. + * in the A23 user manual, but documented at least in V3s user + * manual. */ - if (of_device_is_compatible(pdev->dev.of_node, - "allwinner,sun8i-a23-dma")) + if (sdc->cfg->gate_needed) writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE); return 0;