From patchwork Tue Feb 13 11:28:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 10215865 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 872CE601C2 for ; Tue, 13 Feb 2018 11:27:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6BF102854A for ; Tue, 13 Feb 2018 11:27:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D840286C5; Tue, 13 Feb 2018 11:27:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_NONE,T_DKIM_INVALID autolearn=no version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86E5F2854A for ; Tue, 13 Feb 2018 11:27:35 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id E1C95266E78; Tue, 13 Feb 2018 12:27:33 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id D356426787F; Tue, 13 Feb 2018 12:27:32 +0100 (CET) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by alsa0.perex.cz (Postfix) with ESMTP id B1A97266C0E for ; Tue, 13 Feb 2018 12:27:30 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1DBRT6U008521; Tue, 13 Feb 2018 05:27:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518521249; bh=79jYlxulPGouVz0ERiFBimrZyGIvuk/VpT8qxz3AQ14=; h=From:To:CC:Subject:Date; b=o4ZMalH925hoEVQvx4G370w5MmACx4NXvwIR3mC3JjzjUlUNqrK0ORngt5QnZPKPs XR6Lfp+IbqtX3OCziw/ZyRNe4HgA3BZPJ13fWZjkad5Jf8asY+UQVebF4BIZ6v+qtu QJxJCWgiB/1DZJmqxMFJCY1PSxvaI6CMZJQ90xrw= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1DBRTWg031129; Tue, 13 Feb 2018 05:27:29 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 13 Feb 2018 05:27:29 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 13 Feb 2018 05:27:29 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1DBRRCY007571; Tue, 13 Feb 2018 05:27:27 -0600 From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , Jyri Sarha Date: Tue, 13 Feb 2018 13:28:01 +0200 Message-ID: <20180213112801.32698-1-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.16.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: alsa-devel@alsa-project.org, afd@ti.com Subject: [alsa-devel] [PATCH v3] ASoC: tlv320aic31xx: Fix master mode clock I2S bus clocks X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP In the reset state of the codec we do not have complete playback or capture routes. The audio playback/capture will not work due to missing clock signals on the I2S bus if PLL, MDAC/NDAC/DAC MADC/NADC/ADC is powered down. To make sure that even if all output/input is disconnected the codec is generating clocks, we need to have valid DAPM route in every case to power up the must needed parts of the codec. I have verified that switching DAC (during playback) or ADC (during capture) will stop the I2S clocks, so the only solution is to connect the 'Off' routes as well to output/input. The routes only going to be added if the codec is configured as clock master. Tested on am43x-epos-evm with aic3111 codec in master mode. Signed-off-by: Peter Ujfalusi --- Hi, Changes since v2: - Leftover debug prints removed. Changes since v1: - Only apply the master mode DAPM routes when the codec is clock master - comments added to explain the need. Regards, Peter sound/soc/codecs/tlv320aic31xx.c | 44 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index 858cb8be445f..088648791111 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -166,6 +166,7 @@ struct aic31xx_priv { unsigned int sysclk; u8 p_div; int rate_div_line; + bool master_dapm_route_applied; }; struct aic31xx_rate_divs { @@ -670,6 +671,29 @@ aic310x_audio_map[] = { {"SPK", NULL, "SPK ClassD"}, }; +/* + * Always connected DAPM routes for codec clock master modes. + * If the codec is the master on the I2S bus, we need to power on components + * to have valid DAC_CLK and also the DACs and ADC for playback/capture. + * Otherwise the codec will not generate clocks on the bus. + */ +static const struct snd_soc_dapm_route +common31xx_cm_audio_map[] = { + {"DAC Left Input", "Off", "DAC IN"}, + {"DAC Right Input", "Off", "DAC IN"}, + + {"HPL", NULL, "DAC Left"}, + {"HPR", NULL, "DAC Right"}, +}; + +static const struct snd_soc_dapm_route +aic31xx_cm_audio_map[] = { + {"MIC1LP P-Terminal", "Off", "MIC1LP"}, + {"MIC1RP P-Terminal", "Off", "MIC1RP"}, + {"MIC1LM P-Terminal", "Off", "MIC1LM"}, + {"MIC1LM M-Terminal", "Off", "MIC1LM"}, +}; + static int aic31xx_add_controls(struct snd_soc_codec *codec) { int ret = 0; @@ -916,6 +940,7 @@ static int aic31xx_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; + struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec); u8 iface_reg1 = 0; u8 iface_reg2 = 0; u8 dsp_a_val = 0; @@ -992,6 +1017,25 @@ static int aic31xx_set_dai_fmt(struct snd_soc_dai *codec_dai, AIC31XX_BCLKINV_MASK, iface_reg2); + /* Add the needed DAPM route(s) for codec clock master modes, once */ + if (iface_reg1 & (AIC31XX_BCLK_MASTER | AIC31XX_WCLK_MASTER) && + !aic31xx->master_dapm_route_applied) { + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); + int ret; + + ret = snd_soc_dapm_add_routes(dapm, common31xx_cm_audio_map, + ARRAY_SIZE(common31xx_cm_audio_map)); + if (!ret && !(aic31xx->codec_type & DAC31XX_BIT)) + ret = snd_soc_dapm_add_routes(dapm, + aic31xx_cm_audio_map, + ARRAY_SIZE(aic31xx_cm_audio_map)); + + if (ret) + return ret; + + aic31xx->master_dapm_route_applied = true; + } + return 0; }