From patchwork Tue Sep 25 14:23:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Marco Felsch X-Patchwork-Id: 10614085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 82C6613A4 for ; Tue, 25 Sep 2018 14:24:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 72BBB2A5F1 for ; Tue, 25 Sep 2018 14:24:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 66E6D2A60A; Tue, 25 Sep 2018 14:24:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86CBD2A5F1 for ; Tue, 25 Sep 2018 14:24:58 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 527152678B3; Tue, 25 Sep 2018 16:24:37 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 1C7622678CD; Tue, 25 Sep 2018 16:24:33 +0200 (CEST) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) by alsa0.perex.cz (Postfix) with ESMTP id 0B9962678BC for ; Tue, 25 Sep 2018 16:24:31 +0200 (CEST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1g4oGJ-0004PU-7G; Tue, 25 Sep 2018 16:24:27 +0200 Received: from mfe by dude.hi.pengutronix.de with local (Exim 4.91) (envelope-from ) id 1g4oGI-0001Ls-DJ; Tue, 25 Sep 2018 16:24:26 +0200 From: Marco Felsch To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Date: Tue, 25 Sep 2018 16:23:51 +0200 Message-Id: <20180925142352.24106-5-m.felsch@pengutronix.de> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20180925142352.24106-1-m.felsch@pengutronix.de> References: <20180925142352.24106-1-m.felsch@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: mfe@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: alsa-devel@alsa-project.org Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, =?utf-8?q?Andre?= =?utf-8?q?as_F=C3=A4rber?= , kernel@pengutronix.de, Javier Martinez Canillas , Tushar Behera Subject: [alsa-devel] [PATCH 4/5] ASoC: max98088: Add master clock handling X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andreas Färber If master clock is provided through device tree, then update the master clock frequency during set_sysclk. Cc: Tushar Behera Cc: Javier Martinez Canillas Signed-off-by: Andreas Färber Acked-by: Tushar Behera Reviewed-by: Javier Martinez Canillas [m.felsch@pengutronix.de: move mclk request to i2c_probe] [m.felsch@pengutronix.de: make use of snd_soc_component_get_bias_level()] Signed-off-by: Marco Felsch --- sound/soc/codecs/max98088.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c index 9450d5d9c492..01f1ea0af9c1 100644 --- a/sound/soc/codecs/max98088.c +++ b/sound/soc/codecs/max98088.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -42,6 +43,7 @@ struct max98088_priv { struct regmap *regmap; enum max98088_type devtype; struct max98088_pdata *pdata; + struct clk *mclk; unsigned int sysclk; struct max98088_cdata dai[2]; int eq_textcnt; @@ -1103,6 +1105,11 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai, if (freq == max98088->sysclk) return 0; + if (!IS_ERR(max98088->mclk)) { + freq = clk_round_rate(max98088->mclk, freq); + clk_set_rate(max98088->mclk, freq); + } + /* Setup clocks for slave mode, and using the PLL * PSCLK = 0x01 (when master clk is 10MHz to 20MHz) * 0x02 (when master clk is 20MHz to 30MHz).. @@ -1310,6 +1317,20 @@ static int max98088_set_bias_level(struct snd_soc_component *component, break; case SND_SOC_BIAS_PREPARE: + /* + * SND_SOC_BIAS_PREPARE is called while preparing for a + * transition to ON or away from ON. If current bias_level + * is SND_SOC_BIAS_ON, then it is preparing for a transition + * away from ON. Disable the clock in that case, otherwise + * enable it. + */ + if (!IS_ERR(max98088->mclk)) { + if (snd_soc_component_get_bias_level(component) == + SND_SOC_BIAS_ON) + clk_disable_unprepare(max98088->mclk); + else + clk_prepare_enable(max98088->mclk); + } break; case SND_SOC_BIAS_STANDBY: @@ -1725,6 +1746,14 @@ static int max98088_i2c_probe(struct i2c_client *i2c, if (IS_ERR(max98088->regmap)) return PTR_ERR(max98088->regmap); + max98088->mclk = devm_clk_get(&i2c->dev, "mclk"); + if (IS_ERR(max98088->mclk)) { + if (PTR_ERR(max98088->mclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + dev_err(&i2c->dev, "Invalid MCLK\n"); + return -EINVAL; + } + max98088->devtype = id->driver_data; i2c_set_clientdata(i2c, max98088);