Message ID | 20190308160933.29899-1-daniel.baluta@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ASoC: fsl: sai: Reduce underrun when stream starts | expand |
Hi Daniel, On Fri, Mar 8, 2019 at 1:09 PM Daniel Baluta <daniel.baluta@nxp.com> wrote: > > From: Shengjiu Wang <shengjiu.wang@nxp.com> > > Write initial words into SAI FIFO to reduce the underrun > error. Please provide a better explanation. Why does performing these writes help? Also, the commit message says "reduce", so it seems this is a workaround instead of a proper fix?
On Fri, Mar 8, 2019 at 6:16 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi Daniel, > > On Fri, Mar 8, 2019 at 1:09 PM Daniel Baluta <daniel.baluta@nxp.com> wrote: > > > > From: Shengjiu Wang <shengjiu.wang@nxp.com> > > > > Write initial words into SAI FIFO to reduce the underrun > > error. > > Please provide a better explanation. Hi Fabio, Fair enough, will try to provide a better description in v2 that will also address your questions below. > > Why does performing these writes help? > > Also, the commit message says "reduce", so it seems this is a > workaround instead of a proper fix?
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index db9e0872f73d..99edbba4e8fa 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -503,7 +503,9 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, { struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai); bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + unsigned int channels = substream->runtime->channels; u32 xcsr, count = 100; + int i; /* * Asynchronous mode: Clear SYNC for both Tx and Rx. @@ -526,6 +528,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx), FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE); + for (i = 0; tx && i < channels; i++) + regmap_write(sai->regmap, FSL_SAI_TDR, 0x0); + if (tx) + udelay(10); + regmap_update_bits(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); regmap_update_bits(sai->regmap, FSL_SAI_TCSR,