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[213.102.74.69]) by smtp.gmail.com with ESMTPSA id s10sm3124235ljm.35.2019.08.13.23.08.59 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 23:09:01 -0700 (PDT) From: codekipper@gmail.com To: maxime.ripard@free-electrons.com, wens@csie.org, linux-sunxi@googlegroups.com Date: Wed, 14 Aug 2019 08:08:41 +0200 Message-Id: <20190814060854.26345-3-codekipper@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190814060854.26345-1-codekipper@gmail.com> References: <20190814060854.26345-1-codekipper@gmail.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Marcus Cooper , lgirdwood@gmail.com, linux-kernel@vger.kernel.org, be17068@iperbole.bo.it, broonie@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH v5 02/15] ASoC: sun4i-i2s: Add set_tdm_slot functionality X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Marcus Cooper Codecs without a control connection such as i2s based HDMI audio and the Pine64 DAC require a different amount of bit clocks per frame than what is calculated by the sample width. Use the tdm slot bindings to provide this mechanism. Signed-off-by: Marcus Cooper --- sound/soc/sunxi/sun4i-i2s.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 8201334a059b..7c37b6291df0 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -195,6 +195,9 @@ struct sun4i_i2s { struct regmap_field *field_rxchansel; const struct sun4i_i2s_quirks *variant; + + unsigned int tdm_slots; + unsigned int slot_width; }; struct sun4i_i2s_clk_div { @@ -346,7 +349,7 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai, if (i2s->variant->has_fmt_set_lrck_period) regmap_update_bits(i2s->regmap, SUN4I_I2S_FMT0_REG, SUN8I_I2S_FMT0_LRCK_PERIOD_MASK, - SUN8I_I2S_FMT0_LRCK_PERIOD(32)); + SUN8I_I2S_FMT0_LRCK_PERIOD(word_size)); /* Set sign extension to pad out LSB with 0 */ regmap_field_write(i2s->field_fmt_sext, 0); @@ -450,7 +453,8 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream, regmap_field_write(i2s->field_fmt_sr, sr); return sun4i_i2s_set_clk_rate(dai, params_rate(params), - params_width(params)); + i2s->tdm_slots ? + i2s->slot_width : params_width(params)); } static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) @@ -693,10 +697,25 @@ static int sun4i_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, return 0; } +static int sun4i_i2s_set_dai_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, + unsigned int rx_mask, + int slots, int width) +{ + struct sun4i_i2s *i2s = snd_soc_dai_get_drvdata(dai); + + i2s->tdm_slots = slots; + + i2s->slot_width = width; + + return 0; +} + static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = { .hw_params = sun4i_i2s_hw_params, .set_fmt = sun4i_i2s_set_fmt, .set_sysclk = sun4i_i2s_set_sysclk, + .set_tdm_slot = sun4i_i2s_set_dai_tdm_slot, .trigger = sun4i_i2s_trigger, };