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[213.102.74.69]) by smtp.gmail.com with ESMTPSA id s10sm3124235ljm.35.2019.08.13.23.09.07 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 23:09:08 -0700 (PDT) From: codekipper@gmail.com To: maxime.ripard@free-electrons.com, wens@csie.org, linux-sunxi@googlegroups.com Date: Wed, 14 Aug 2019 08:08:45 +0200 Message-Id: <20190814060854.26345-7-codekipper@gmail.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190814060854.26345-1-codekipper@gmail.com> References: <20190814060854.26345-1-codekipper@gmail.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Marcus Cooper , lgirdwood@gmail.com, linux-kernel@vger.kernel.org, be17068@iperbole.bo.it, broonie@kernel.org, linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH v5 06/15] ASoC: sun4i-i2s: Add functions for RX and TX channel enables X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Marcus Cooper Newer SoCs like the H6 have the channel enable bits in a different position to what is on the H3. As we will eventually add multi- channel support then create function calls as opposed to regmap fields to add support for different devices. Signed-off-by: Marcus Cooper --- sound/soc/sunxi/sun4i-i2s.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 4a748747ccd7..ad2ff83deeb7 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -172,6 +172,8 @@ struct sun4i_i2s_quirks { int (*set_format)(struct sun4i_i2s *, unsigned int); void (*set_txchanoffset)(const struct sun4i_i2s *, int); void (*set_rxchanoffset)(const struct sun4i_i2s *); + void (*set_txchanen)(const struct sun4i_i2s *, int, int); + void (*set_rxchanen)(const struct sun4i_i2s *, int); }; struct sun4i_i2s { @@ -444,6 +446,25 @@ static void sun8i_i2s_set_rxchanoffset(const struct sun4i_i2s *i2s) SUN8I_I2S_TX_CHAN_OFFSET(i2s->offset)); } +static void sun8i_i2s_set_txchanen(const struct sun4i_i2s *i2s, int output, + int channel) +{ + if (output >= 0 && output < 4) { + regmap_update_bits(i2s->regmap, + SUN8I_I2S_TX_CHAN_SEL_REG + (output * 4), + SUN8I_I2S_TX_CHAN_EN_MASK, + SUN8I_I2S_TX_CHAN_EN(channel)); + } +} + +static void sun8i_i2s_set_rxchanen(const struct sun4i_i2s *i2s, int channel) +{ + regmap_update_bits(i2s->regmap, + SUN8I_I2S_RX_CHAN_SEL_REG, + SUN8I_I2S_TX_CHAN_EN_MASK, + SUN8I_I2S_TX_CHAN_EN(channel)); +} + static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -479,10 +500,11 @@ static int sun4i_i2s_hw_params(struct snd_pcm_substream *substream, regmap_field_write(i2s->field_rxchansel, SUN4I_I2S_CHAN_SEL(params_channels(params))); - if (i2s->variant->has_chsel_tx_chen) - regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG, - SUN8I_I2S_TX_CHAN_EN_MASK, - SUN8I_I2S_TX_CHAN_EN(channels)); + if (i2s->variant->set_txchanen) + i2s->variant->set_txchanen(i2s, 0, channels); + + if (i2s->variant->set_rxchanen) + i2s->variant->set_rxchanen(i2s, channels); switch (params_physical_width(params)) { case 16: @@ -1098,6 +1120,8 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = { .set_format = sun8i_i2s_set_format, .set_txchanoffset = sun8i_i2s_set_txchanoffset, .set_rxchanoffset = sun8i_i2s_set_rxchanoffset, + .set_txchanen = sun8i_i2s_set_txchanen, + .set_rxchanen = sun8i_i2s_set_rxchanen, }; static const struct sun4i_i2s_quirks sun50i_a64_codec_i2s_quirks = {