Message ID | 20191028214216.1508370-7-alexander.deucher@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[165.204.84.11]) by smtp.gmail.com with ESMTPSA id l68sm3421090ywf.95.2019.10.28.14.43.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 14:43:09 -0700 (PDT) From: Alex Deucher <alexdeucher@gmail.com> X-Google-Original-From: Alex Deucher <alexander.deucher@amd.com> To: amd-gfx@lists.freedesktop.org, alsa-devel@alsa-project.org, tiwai@suse.de, lukas@wunner.de Date: Mon, 28 Oct 2019 17:42:01 -0400 Message-Id: <20191028214216.1508370-7-alexander.deucher@amd.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191028214216.1508370-1-alexander.deucher@amd.com> References: <20191028214216.1508370-1-alexander.deucher@amd.com> MIME-Version: 1.0 Cc: Alex Deucher <alexander.deucher@amd.com>, Evan Quan <evan.quan@amd.com> Subject: [alsa-devel] [PATCH 06/21] drm/amdgpu: add supports_baco callback for VI asics. X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" <alsa-devel.alsa-project.org> List-Unsubscribe: <https://mailman.alsa-project.org/mailman/options/alsa-devel>, <mailto:alsa-devel-request@alsa-project.org?subject=unsubscribe> List-Archive: <http://mailman.alsa-project.org/pipermail/alsa-devel/> List-Post: <mailto:alsa-devel@alsa-project.org> List-Help: <mailto:alsa-devel-request@alsa-project.org?subject=help> List-Subscribe: <https://mailman.alsa-project.org/mailman/listinfo/alsa-devel>, <mailto:alsa-devel-request@alsa-project.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" <alsa-devel-bounces@alsa-project.org> |
Series |
Enable BACO for power savings (v2)
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expand
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diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 78e5cdc0c058..871c0b8c6b0b 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -745,6 +745,27 @@ static int vi_asic_pci_config_reset(struct amdgpu_device *adev) return r; } +static bool vi_asic_supports_baco(struct amdgpu_device *adev) +{ + bool baco_support; + + switch (adev->asic_type) { + case CHIP_FIJI: + case CHIP_TONGA: + case CHIP_POLARIS10: + case CHIP_POLARIS11: + case CHIP_POLARIS12: + case CHIP_TOPAZ: + smu7_asic_get_baco_capability(adev, &baco_support); + break; + default: + baco_support = false; + break; + } + + return baco_support; +} + static enum amd_reset_method vi_asic_reset_method(struct amdgpu_device *adev) { @@ -1116,6 +1137,7 @@ static const struct amdgpu_asic_funcs vi_asic_funcs = .get_pcie_usage = &vi_get_pcie_usage, .need_reset_on_init = &vi_need_reset_on_init, .get_pcie_replay_count = &vi_get_pcie_replay_count, + .supports_baco = &vi_asic_supports_baco, }; #define CZ_REV_BRISTOL(rev) \