Message ID | 20200805091116.2314-3-mkumard@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Tegra Specific fixes | expand |
On Wed, 05 Aug 2020 11:11:15 +0200, Mohan Kumar wrote: > > Behaviour flag dma_stop_delay is added as a new member in hdac_bus > structure to avoid memory decode error incase DMA RUN bit is not > disabled in the given timeout from snd_hdac_stream_sync function and > followed by stream reset which results in memory decode error between > reset set and clear operation. The new field looks like not only a flag but also contains the actual delay time in usec. Please give a short comment at the struct field. thanks, Takashi > > Signed-off-by: Mohan Kumar <mkumard@nvidia.com> > --- > include/sound/hdaudio.h | 2 ++ > sound/hda/hdac_stream.c | 7 +++++++ > 2 files changed, 9 insertions(+) > > diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h > index c1f78d9a6e47..cf77c6b83016 100644 > --- a/include/sound/hdaudio.h > +++ b/include/sound/hdaudio.h > @@ -347,6 +347,8 @@ struct hdac_bus { > > int bdl_pos_adj; /* BDL position adjustment */ > > + unsigned int dma_stop_delay; > + > /* locks */ > spinlock_t reg_lock; > struct mutex cmd_mutex; > diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c > index a38a2af1654f..abe7a1b16fe1 100644 > --- a/sound/hda/hdac_stream.c > +++ b/sound/hda/hdac_stream.c > @@ -150,9 +150,12 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > { > unsigned char val; > int timeout; > + int dma_run_state; > > snd_hdac_stream_clear(azx_dev); > > + dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; > + > snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); > udelay(3); > timeout = 300; > @@ -162,6 +165,10 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) > if (val) > break; > } while (--timeout); > + > + if (azx_dev->bus->dma_stop_delay && dma_run_state) > + udelay(azx_dev->bus->dma_stop_delay); > + > val &= ~SD_CTL_STREAM_RESET; > snd_hdac_stream_writeb(azx_dev, SD_CTL, val); > udelay(3); > -- > 2.17.1 >
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h index c1f78d9a6e47..cf77c6b83016 100644 --- a/include/sound/hdaudio.h +++ b/include/sound/hdaudio.h @@ -347,6 +347,8 @@ struct hdac_bus { int bdl_pos_adj; /* BDL position adjustment */ + unsigned int dma_stop_delay; + /* locks */ spinlock_t reg_lock; struct mutex cmd_mutex; diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index a38a2af1654f..abe7a1b16fe1 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -150,9 +150,12 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) { unsigned char val; int timeout; + int dma_run_state; snd_hdac_stream_clear(azx_dev); + dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; + snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); udelay(3); timeout = 300; @@ -162,6 +165,10 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) if (val) break; } while (--timeout); + + if (azx_dev->bus->dma_stop_delay && dma_run_state) + udelay(azx_dev->bus->dma_stop_delay); + val &= ~SD_CTL_STREAM_RESET; snd_hdac_stream_writeb(azx_dev, SD_CTL, val); udelay(3);
Behaviour flag dma_stop_delay is added as a new member in hdac_bus structure to avoid memory decode error incase DMA RUN bit is not disabled in the given timeout from snd_hdac_stream_sync function and followed by stream reset which results in memory decode error between reset set and clear operation. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> --- include/sound/hdaudio.h | 2 ++ sound/hda/hdac_stream.c | 7 +++++++ 2 files changed, 9 insertions(+)