| Message ID | 20211204143725.31646-6-digetx@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support HDMI audio on NVIDIA Tegra20 | expand |
On Sat, Dec 04, 2021 at 05:37:08PM +0300, Dmitry Osipenko wrote: > FIFO trigger level must be not less than the size of DMA burst, otherwise "must be bigger than or equal to"? > audio will be played x4 faster that it should be because part of the DMA "faster than" > data will be dropped on FIFO input buffer overflow. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > sound/soc/tegra/tegra20_spdif.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Makes sense: Acked-by: Thierry Reding <treding@nvidia.com>
diff --git a/sound/soc/tegra/tegra20_spdif.c b/sound/soc/tegra/tegra20_spdif.c index 7751575cd6d6..6f0570cde964 100644 --- a/sound/soc/tegra/tegra20_spdif.c +++ b/sound/soc/tegra/tegra20_spdif.c @@ -69,6 +69,14 @@ static int tegra20_spdif_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_CTRL, mask, val); + /* + * FIFO trigger level must be bigger than DMA burst or equal to it, + * otherwise data is discarded on overflow. + */ + regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_DATA_FIFO_CSR, + TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_MASK, + TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_TU4_WORD_FULL); + switch (params_rate(params)) { case 32000: spdifclock = 4096000;
FIFO trigger level must be not less than the size of DMA burst, otherwise audio will be played x4 faster that it should be because part of the DMA data will be dropped on FIFO input buffer overflow. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- sound/soc/tegra/tegra20_spdif.c | 8 ++++++++ 1 file changed, 8 insertions(+)