Message ID | 20220304150721.3802-2-tanureal@opensource.cirrus.com (mailing list archive) |
---|---|
State | Superseded |
Commit | 03a7895ee701e873c88c06bdb830ff40adb2be73 |
Headers | show |
Series | Support external boost at CS35l41 ASoC driver | expand |
On Fri, Mar 04, 2022 at 03:07:02PM +0000, Lucas Tanure wrote: > From: David Rhodes <drhodes@opensource.cirrus.com> > > Fix GPIO2 polarity and direction configuration > > Fixes: fe1024d50477b ("ASoC: cs35l41: Combine adjacent register writes") > Signed-off-by: David Rhodes <drhodes@opensource.cirrus.com> > Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> > --- Really sorry I only just spotted this but you are missing your own sign off here. You always need to personally sign each patch you are sending up. Thanks, Charles
On 3/4/22 3:22 PM, Charles Keepax <ckeepax@opensource.cirrus.com> wrote: > On Fri, Mar 04, 2022 at 03:07:02PM +0000, Lucas Tanure wrote: > > From: David Rhodes <drhodes@opensource.cirrus.com> > > > > Fix GPIO2 polarity and direction configuration > > > > Fixes: fe1024d50477b ("ASoC: cs35l41: Combine adjacent register writes") > > Signed-off-by: David Rhodes <drhodes@opensource.cirrus.com> > > Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> > > --- > > Really sorry I only just spotted this but you are missing your > own sign off here. You always need to personally sign each patch > you are sending up. > > Thanks, > Charles > Yes, sorry about that. I will give some time for more reviews on this version and fix it on v3.
diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c index 77a017694645..90c91b00288b 100644 --- a/sound/soc/codecs/cs35l41.c +++ b/sound/soc/codecs/cs35l41.c @@ -1035,8 +1035,8 @@ static int cs35l41_irq_gpio_config(struct cs35l41_private *cs35l41) regmap_update_bits(cs35l41->regmap, CS35L41_GPIO2_CTRL1, CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK, - irq_gpio_cfg1->irq_pol_inv << CS35L41_GPIO_POL_SHIFT | - !irq_gpio_cfg1->irq_out_en << CS35L41_GPIO_DIR_SHIFT); + irq_gpio_cfg2->irq_pol_inv << CS35L41_GPIO_POL_SHIFT | + !irq_gpio_cfg2->irq_out_en << CS35L41_GPIO_DIR_SHIFT); regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK | CS35L41_GPIO2_CTRL_MASK,