diff mbox series

[18/49] mfd: qcom-pm8008: Add broken_mask_unmask irq chip flag

Message ID 20220620200644.1961936-19-aidanmacdonald.0x0@gmail.com (mailing list archive)
State New, archived
Headers show
Series regmap-irq cleanups and refactoring | expand

Commit Message

Aidan MacDonald June 20, 2022, 8:06 p.m. UTC 
The qcom-pm8008 appears to use "1 to enable" convention for
enabling interrupts, with separate set and clear registers.
It's relying on masks and unmasks being inverted from their
intuitive meaning, so it needs the broken_mask_unmask flag.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/mfd/qcom-pm8008.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Andy Shevchenko June 21, 2022, 9:35 a.m. UTC | #1 
On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald
<aidanmacdonald.0x0@gmail.com> wrote:
>
> The qcom-pm8008 appears to use "1 to enable" convention for
> enabling interrupts, with separate set and clear registers.
> It's relying on masks and unmasks being inverted from their

It relies

> intuitive meaning, so it needs the broken_mask_unmask flag.

How has it worked until now?
diff mbox series

Patch

diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c
index da16566f7883..18095e72714e 100644
--- a/drivers/mfd/qcom-pm8008.c
+++ b/drivers/mfd/qcom-pm8008.c
@@ -141,6 +141,7 @@  static struct regmap_irq_chip pm8008_irq_chip = {
 	.status_base		= PM8008_STATUS_BASE,
 	.mask_base		= PM8008_MASK_BASE,
 	.unmask_base		= PM8008_UNMASK_BASE,
+	.broken_mask_unmask	= true,
 	.ack_base		= PM8008_ACK_BASE,
 	.config_base		= pm8008_config_regs,
 	.num_config_bases	= ARRAY_SIZE(pm8008_config_regs),