diff mbox series

[19/49] mfd: stpmic1: Add broken_mask_unmask irq chip flag

Message ID 20220620200644.1961936-20-aidanmacdonald.0x0@gmail.com (mailing list archive)
State New, archived
Headers show
Series regmap-irq cleanups and refactoring | expand

Commit Message

Aidan MacDonald June 20, 2022, 8:06 p.m. UTC 
The STPMIC1 has a normal "1 to disable" mask register with
separate set and clear registers. It's relying on masks and
unmasks being inverted from their intuitive meaning, so it
needs the broken_mask_unmask flag.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/mfd/stpmic1.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Andy Shevchenko June 21, 2022, 9:35 a.m. UTC | #1 
On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald
<aidanmacdonald.0x0@gmail.com> wrote:
>
> The STPMIC1 has a normal "1 to disable" mask register with
> separate set and clear registers. It's relying on masks and
> unmasks being inverted from their intuitive meaning, so it
> needs the broken_mask_unmask flag.

Same comment as per previous patch and continues to all patches of a kind.
diff mbox series

Patch

diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c
index eb3da558c3fb..2307d1b0269d 100644
--- a/drivers/mfd/stpmic1.c
+++ b/drivers/mfd/stpmic1.c
@@ -110,6 +110,7 @@  static const struct regmap_irq_chip stpmic1_regmap_irq_chip = {
 	.status_base = INT_PENDING_R1,
 	.mask_base = INT_CLEAR_MASK_R1,
 	.unmask_base = INT_SET_MASK_R1,
+	.broken_mask_unmask = true,
 	.ack_base = INT_CLEAR_R1,
 	.num_regs = STPMIC1_PMIC_NUM_IRQ_REGS,
 	.irqs = stpmic1_irqs,