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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(39860400002)(136003)(346002)(396003)(376002)(40470700004)(46966006)(36840700001)(8936002)(7696005)(26005)(6666004)(40460700003)(40480700001)(478600001)(41300700001)(426003)(82310400005)(2616005)(47076005)(186003)(336012)(5660300002)(1076003)(4326008)(8676002)(2906002)(36756003)(110136005)(70206006)(70586007)(316002)(82740400003)(36860700001)(356005)(81166007)(86362001)(54906003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2022 16:59:39.6769 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 419235a8-0f1f-4880-4cf1-08da884d87c2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6382 Cc: Sunil-kumar.Dommati@amd.com, open list , Basavaraj.Hiregoudar@amd.com, Takashi Iwai , Liam Girdwood , mario.limonciello@amd.com, Vijendar.Mukunda@amd.com, alexander.deucher@amd.com, Syed Saba Kareem X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add Pink Sardine platform ACP6.2 PCI driver init/deinit functions. Signed-off-by: Syed Saba Kareem Signed-off-by: Vijendar Mukunda --- sound/soc/amd/ps/acp62.h | 12 +++++ sound/soc/amd/ps/pci-ps.c | 106 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h index 5291585f45f9..1f5e7d758f9f 100644 --- a/sound/soc/amd/ps/acp62.h +++ b/sound/soc/amd/ps/acp62.h @@ -9,6 +9,18 @@ #define ACP_DEVICE_ID 0x15E2 +#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 +#define ACP_PGFSM_CNTL_POWER_ON_MASK 1 +#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0 +#define ACP_PGFSM_STATUS_MASK 3 +#define ACP_POWERED_ON 0 +#define ACP_POWER_ON_IN_PROGRESS 1 +#define ACP_POWERED_OFF 2 +#define ACP_POWER_OFF_IN_PROGRESS 3 + +#define ACP_ERROR_MASK 0x20000000 +#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF + static inline u32 acp62_readl(void __iomem *base_addr) { return readl(base_addr); diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index 8bb33845622a..a87dbf8847e6 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "acp62.h" @@ -15,6 +16,100 @@ struct acp62_dev_data { void __iomem *acp62_base; }; +static int acp62_power_on(void __iomem *acp_base) +{ + u32 val; + int timeout; + + val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + + if (!val) + return val; + + if ((val & ACP_PGFSM_STATUS_MASK) != ACP_POWER_ON_IN_PROGRESS) + acp62_writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + if (!val) + return 0; + udelay(1); + } + return -ETIMEDOUT; +} + +static int acp62_reset(void __iomem *acp_base) +{ + u32 val; + int timeout; + + acp62_writel(1, acp_base + ACP_SOFT_RESET); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_SOFT_RESET); + if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK) + break; + cpu_relax(); + } + acp62_writel(0, acp_base + ACP_SOFT_RESET); + timeout = 0; + while (++timeout < 500) { + val = acp62_readl(acp_base + ACP_SOFT_RESET); + if (!val) + return 0; + cpu_relax(); + } + return -ETIMEDOUT; +} + +static void acp62_enable_interrupts(void __iomem *acp_base) +{ + acp62_writel(1, acp_base + ACP_EXTERNAL_INTR_ENB); +} + +static void acp62_disable_interrupts(void __iomem *acp_base) +{ + acp62_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + + ACP_EXTERNAL_INTR_STAT); + acp62_writel(0, acp_base + ACP_EXTERNAL_INTR_CNTL); + acp62_writel(0, acp_base + ACP_EXTERNAL_INTR_ENB); +} + +static int acp62_init(void __iomem *acp_base, struct device *dev) +{ + int ret; + + ret = acp62_power_on(acp_base); + if (ret) { + dev_err(dev, "ACP power on failed\n"); + return ret; + } + acp62_writel(0x01, acp_base + ACP_CONTROL); + ret = acp62_reset(acp_base); + if (ret) { + dev_err(dev, "ACP reset failed\n"); + return ret; + } + acp62_writel(0x03, acp_base + ACP_CLKMUX_SEL); + acp62_enable_interrupts(acp_base); + return 0; +} + +static int acp62_deinit(void __iomem *acp_base, struct device *dev) +{ + int ret; + + acp62_disable_interrupts(acp_base); + ret = acp62_reset(acp_base); + if (ret) { + dev_err(dev, "ACP reset failed\n"); + return ret; + } + acp62_writel(0, acp_base + ACP_CLKMUX_SEL); + acp62_writel(0, acp_base + ACP_CONTROL); + return 0; +} + static int snd_acp62_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { @@ -56,6 +151,10 @@ static int snd_acp62_probe(struct pci_dev *pci, } pci_set_master(pci); pci_set_drvdata(pci, adata); + ret = acp62_init(adata->acp62_base, &pci->dev); + if (ret) + goto release_regions; + return 0; release_regions: pci_release_regions(pci); @@ -67,6 +166,13 @@ static int snd_acp62_probe(struct pci_dev *pci, static void snd_acp62_remove(struct pci_dev *pci) { + struct acp62_dev_data *adata; + int ret; + + adata = pci_get_drvdata(pci); + ret = acp62_deinit(adata->acp62_base, &pci->dev); + if (ret) + dev_err(&pci->dev, "ACP de-init failed\n"); pci_release_regions(pci); pci_disable_device(pci); }