Message ID | 20220905172420.3801-1-mkumard@nvidia.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 8d44e6044a0e885acdd01813768a0b27906d64fd |
Headers | show
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ALSA: hda/tegra: Align BDL entry to 4KB boundary
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On Mon, 05 Sep 2022 19:24:20 +0200, Mohan Kumar wrote: > > AZA HW may send a burst read/write request crossing 4K memory boundary. > The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to > include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K > boundary. > > Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Thanks, applied. Takashi
diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c index 7debb2c76aa6..976a112c7d00 100644 --- a/sound/pci/hda/hda_tegra.c +++ b/sound/pci/hda/hda_tegra.c @@ -474,7 +474,8 @@ MODULE_DEVICE_TABLE(of, hda_tegra_match); static int hda_tegra_probe(struct platform_device *pdev) { const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR | - AZX_DCAPS_PM_RUNTIME; + AZX_DCAPS_PM_RUNTIME | + AZX_DCAPS_4K_BDLE_BOUNDARY; struct snd_card *card; struct azx *chip; struct hda_tegra *hda;
AZA HW may send a burst read/write request crossing 4K memory boundary. The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K boundary. Signed-off-by: Mohan Kumar <mkumard@nvidia.com> --- sound/pci/hda/hda_tegra.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)