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[2/6] ASoC: amd: ps: add fix for dma irq mask for rx streams for SDW0 instance

Message ID 20230626105356.2580125-2-Vijendar.Mukunda@amd.com (mailing list archive)
State Accepted
Commit 322a163ea6a38f63555d824c5b66c7df5a595c2d
Headers show
Series [1/6] ASoC: amd: ps: add comments for DMA irq bits mapping | expand

Commit Message

Mukunda,Vijendar June 26, 2023, 10:53 a.m. UTC 
Correct the DMA irq mask macro to program DMA irq bits correctly for
SDW0 instance rx streams.

Fixes: 298d4f7b1765 ("ASoC: amd: ps: add support for SoundWire DMA interrupts")

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
---
 sound/soc/amd/ps/acp63.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/sound/soc/amd/ps/acp63.h b/sound/soc/amd/ps/acp63.h
index 733a16e23d32..8b853b8d0219 100644
--- a/sound/soc/amd/ps/acp63.h
+++ b/sound/soc/amd/ps/acp63.h
@@ -129,7 +129,7 @@ 
  * 5 (SDW0_AUDIO2_RX)	23
  */
 #define SDW0_DMA_TX_IRQ_MASK(i)	(ACP_AUDIO0_TX_THRESHOLD - (2 * (i)))
-#define SDW0_DMA_RX_IRQ_MASK(i)	(ACP_AUDIO0_RX_THRESHOLD - (2 * (i)))
+#define SDW0_DMA_RX_IRQ_MASK(i)	(ACP_AUDIO0_RX_THRESHOLD - (2 * ((i) - 3)))
 
 /*
  * Below entries describes SDW1 instance DMA stream id and DMA irq bit mapping